soc/amd/*/chipset.cb: don't call dummy device functions host bridges
Function 0 of the devices that have the bridges to other buses are dummy
functions that can be left enabled to not have to shuffle around the
device function numbers when the first PCI bridge on those devices isn't
enabled. Those dummy device functions are however not PCI host bridges,
so change the comments from 'Dummy Host Bridge' to 'Dummy device
function'.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Nico Huber <nico.h@gmx.de>
Change-Id: Ibddfdf558d84bc44434d718b86f41bd06044b22a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79396
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
diff --git a/src/soc/amd/mendocino/chipset_mendocino.cb b/src/soc/amd/mendocino/chipset_mendocino.cb
index e40124f..6ee1e63 100644
--- a/src/soc/amd/mendocino/chipset_mendocino.cb
+++ b/src/soc/amd/mendocino/chipset_mendocino.cb
@@ -7,15 +7,15 @@
device pci 00.0 alias gnb on ops mendocino_root_complex_operations end
device pci 00.2 alias iommu off ops amd_iommu_ops end
- device pci 01.0 on end # Dummy Host Bridge
+ device pci 01.0 on end # Dummy device function
- device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.0 on end # Dummy device function, do not disable
device pci 02.1 alias gpp_bridge_0 hidden ops amd_external_pcie_gpp_ops end
device pci 02.2 alias gpp_bridge_1 hidden ops amd_external_pcie_gpp_ops end
device pci 02.3 alias gpp_bridge_2 hidden ops amd_external_pcie_gpp_ops end
device pci 02.4 alias gpp_bridge_3 hidden ops amd_external_pcie_gpp_ops end
- device pci 08.0 on end # Dummy Host Bridge, do not disable
+ device pci 08.0 on end # Dummy device function, do not disable
device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A
ops amd_internal_pcie_gpp_ops
device pci 0.0 alias gfx off ops amd_graphics_ops end # Internal GPU (GFX)