soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRS
This option will make the ramstage MTRR core set the additional bits in
the fixed MTRRs that need to be set on AMD CPUs to enable caching.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I94bca61acfc6e38a6d808eb5020537b4e8596178
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49851
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 15a4037..08d8397 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -29,6 +29,7 @@
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
select SOC_AMD_COMMON_BLOCK_UART
select UDK_2017_BINDING
+ select X86_AMD_FIXED_MTRRS
config CHIPSET_DEVICETREE
string