superio/acpi: allow 3 I/O ranges on generic device
Some Super I/O logical devices have three I/O port ranges, such as the
GPIO on the IT8720F. Allow specifying a third I/O range. While here, fix
a typo in the I/O range description.
Change-Id: Idad03f3881e0fbf2135562316d177972f931afec
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-on: https://review.coreboot.org/20024
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/superio/acpi/pnp.asl b/src/superio/acpi/pnp.asl
index b00e490..114dfe9 100644
--- a/src/superio/acpi/pnp.asl
+++ b/src/superio/acpi/pnp.asl
@@ -34,6 +34,8 @@
#define PNP_IO0_LOW_BYTE IO0L
#define PNP_IO1_HIGH_BYTE IO1H
#define PNP_IO1_LOW_BYTE IO1L
+#define PNP_IO2_HIGH_BYTE IO2H
+#define PNP_IO2_LOW_BYTE IO2L
#define PNP_IRQ0 IRQ0
#define PNP_IRQ1 IRQ1
#define PNP_DMA0 DMA0
diff --git a/src/superio/acpi/pnp_generic.asl b/src/superio/acpi/pnp_generic.asl
index 8f8d137..f46fbda 100644
--- a/src/superio/acpi/pnp_generic.asl
+++ b/src/superio/acpi/pnp_generic.asl
@@ -32,10 +32,13 @@
* SUPERIO_PNP_PM_LDN The logical device number to access the PM_REG
* bit (required if SUPERIO_PNP_PM_REG is defined)
* SUPERIO_PNP_IO0 The alignment and length of the first PnP i/o
- * resource (comma seperated, e.g. `0x02, 0x08`,
+ * resource (comma separated, e.g. `0x02, 0x08`,
* optional)
* SUPERIO_PNP_IO1 The alignment and length of the second PnP i/o
- * resource (comma seperated, e.g. `0x02, 0x08`,
+ * resource (comma separated, e.g. `0x02, 0x08`,
+ * optional)
+ * SUPERIO_PNP_IO2 The alignment and length of the third PnP i/o
+ * resource (comma separated, e.g. `0x02, 0x08`,
* optional)
* SUPERIO_PNP_IRQ0 If defined, the first PnP IRQ register is enabled
* SUPERIO_PNP_IRQ1 If defined, the second PnP IRQ register is enabled
@@ -96,6 +99,9 @@
#ifdef SUPERIO_PNP_IO1
IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO1, IO1)
#endif
+#ifdef SUPERIO_PNP_IO2
+ IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO2, IO2)
+#endif
#ifdef SUPERIO_PNP_IRQ0
IRQNoFlags (IR0) {}
#endif
@@ -113,6 +119,9 @@
#ifdef SUPERIO_PNP_IO1
PNP_READ_IO(PNP_IO1, CRS, IO1)
#endif
+#ifdef SUPERIO_PNP_IO2
+ PNP_READ_IO(PNP_IO2, CRS, IO2)
+#endif
#ifdef SUPERIO_PNP_IRQ0
PNP_READ_IRQ(PNP_IRQ0, CRS, IR0)
#endif
@@ -135,6 +144,9 @@
#ifdef SUPERIO_PNP_IO1
IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO1, IO1)
#endif
+#ifdef SUPERIO_PNP_IO2
+ IO (Decode16, 0x0000, 0x0000, SUPERIO_PNP_IO2, IO2)
+#endif
#ifdef SUPERIO_PNP_IRQ0
IRQNoFlags (IR0) {}
#endif
@@ -152,6 +164,9 @@
#ifdef SUPERIO_PNP_IO1
PNP_WRITE_IO(PNP_IO1, Arg0, IO1)
#endif
+#ifdef SUPERIO_PNP_IO2
+ PNP_WRITE_IO(PNP_IO2, Arg0, IO2)
+#endif
#ifdef SUPERIO_PNP_IRQ0
PNP_WRITE_IRQ(PNP_IRQ0, Arg0, IR0)
#endif