| config SOC_MEDIATEK_COMMON |
| bool |
| help |
| common code blocks for Mediatek SOCs |
| |
| if SOC_MEDIATEK_COMMON |
| |
| config MEDIATEK_DRAM_DVFS |
| bool |
| default n |
| help |
| This option enables DRAM calibration with multiple frequencies (low, |
| medium and high frequency groups, with total 7 frequencies) for DVFS |
| feature. All supported data rates are: 800, 1200, 1600, 1866, 2400, |
| 3200, 4266. |
| |
| config MEDIATEK_DRAM_DVFS_LIMIT_FREQ_CNT |
| bool |
| default y |
| depends on MEDIATEK_DRAM_DVFS |
| help |
| This options limit DRAM frequency calibration count from total 7 to 3, |
| other frequency will directly use the low frequency shu result. |
| |
| config MEMORY_TEST |
| bool |
| default y |
| help |
| This option enables memory basic compare test to verify the DRAM read |
| or write is as expected. |
| |
| config DPM_FOUR_CHANNEL |
| bool |
| default n |
| help |
| This option enables four channel configuration for DPM. |
| |
| config MTK_DFD |
| bool "Enable MediaTek DFD (Design For Debug) settings" |
| help |
| DFD (Design for Debug) is a debugging tool, which scans flip-flops |
| and dumps to internal RAM on the WDT reset. We reserve 1MB on DRAM |
| to store logs of DFD. |
| |
| endif |