Split NORTHBRIDGE_INTEL_I945 into more precise _I945GC and _I945GM
Both chipsets use the src/northbridge/intel/i945 code but that code
needs to know which chipset is actually used. Having separate
NORTHBRIDGE_ options allows the I945GC/I945GM choice to be removed
since code can test the NORTHBRIDGE_ option directly.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/northbridge/intel/Makefile.inc b/src/northbridge/intel/Makefile.inc
index 4a150df..8042bf0 100644
--- a/src/northbridge/intel/Makefile.inc
+++ b/src/northbridge/intel/Makefile.inc
@@ -7,4 +7,5 @@
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82810) += i82810
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I82830) += i82830
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I855) += i855
-subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945) += i945
+subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945GC) += i945
+subdirs-$(CONFIG_NORTHBRIDGE_INTEL_I945GM) += i945
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index cee1a87..6a8d376 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -17,38 +17,27 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-config NORTHBRIDGE_INTEL_I945
+config NORTHBRIDGE_INTEL_I945GC
bool
select HAVE_DEBUG_RAM_SETUP
+config NORTHBRIDGE_INTEL_I945GM
+ bool
+ select HAVE_DEBUG_RAM_SETUP
+
+if NORTHBRIDGE_INTEL_I945GC || NORTHBRIDGE_INTEL_I945GM
+
config FALLBACK_VGA_BIOS_ID
string
default "8086,27a2"
- depends on NORTHBRIDGE_INTEL_I945
-
-choice
- default I945GM
- depends on NORTHBRIDGE_INTEL_I945
- help
- Different i945 variants require slightly different setup.
-
-config I945GM
- bool "i945GM (Mobile) chipset"
-
-config I945GC
- bool "i945GC chipset"
-
-endchoice
config CHANNEL_XOR_RANDOMIZATION
bool
default n
- depends on NORTHBRIDGE_INTEL_I945
config OVERRIDE_CLOCK_DISABLE
bool
default n
- depends on NORTHBRIDGE_INTEL_I945
help
Usually system firmware turns off system memory clock
signals to unused SO-DIMM slots to reduce EMI and power
@@ -59,8 +48,9 @@
config MAXIMUM_SUPPORTED_FREQUENCY
int
default 0
- depends on NORTHBRIDGE_INTEL_I945
help
If non-zero, this designates the maximum DDR frequency
the board supports, despite what the chipset should be
capable of.
+
+endif
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 50cab49..62cd193 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -90,7 +90,7 @@
static int memclk(void)
{
int offset = 0;
-#if CONFIG_I945GM
+#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
offset++;
#endif
switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) {
@@ -102,7 +102,7 @@
return -1;
}
-#if CONFIG_I945GM
+#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
static int fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) {
@@ -113,8 +113,7 @@
}
return -1;
}
-#endif
-#if CONFIG_I945GC
+#elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
static int fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) {
@@ -1045,7 +1044,7 @@
return nc;
}
-#if CONFIG_I945GM
+#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
/* Strength multiplier tables */
static const u8 dual_channel_strength_multiplier[] = {
0x44, 0x11, 0x11, 0x11, 0x44, 0x44, 0x44, 0x11,
@@ -1100,8 +1099,7 @@
0x33, 0x00, 0x00, 0x11, 0x00, 0x44, 0x33, 0x11,
0x33, 0x00, 0x11, 0x00, 0x44, 0x44, 0x33, 0x11
};
-#endif
-#if CONFIG_I945GC
+#elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
static const u8 dual_channel_strength_multiplier[] = {
0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22,
0x44, 0x22, 0x00, 0x00, 0x44, 0x44, 0x44, 0x22,
@@ -2155,7 +2153,7 @@
/**
* We add the indices according to our clocks from CLKCFG.
*/
-#if CONFIG_I945GM
+#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
static const u32 data_clock_crossing[] = {
0x00100401, 0x00000000, /* DDR400 FSB400 */
0xffffffff, 0xffffffff, /* nonexistant */
@@ -2200,8 +2198,7 @@
0xffffffff, 0xffffffff, /* nonexistant */
};
-#endif
-#if CONFIG_I945GC
+#elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
/* i945 G/P */
static const u32 data_clock_crossing[] = {
0xffffffff, 0xffffffff, /* nonexistant */
@@ -2792,10 +2789,9 @@
{
u8 clocks[2] = { 0, 0 };
-#if CONFIG_I945GM
+#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
#define CLOCKS_WIDTH 2
-#endif
-#if CONFIG_I945GC
+#elif defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
#define CLOCKS_WIDTH 3
#endif
if (sysinfo->dimm[0] != SYSINFO_DIMM_NOT_POPULATED)