src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb

chip soc/intel/alderlake

	device domain 0 on
		device ref pch_espi on
			chip ec/google/chromeec
				use conn0 as mux_conn[0]
				use conn1 as mux_conn[1]
				use conn2 as mux_conn[2]
				device pnp 0c09.0 on end
			end
		end
		device ref tcss_xhci on
			chip drivers/usb/acpi
				register "type" = "UPC_TYPE_HUB"
				device ref tcss_root_hub on
					chip drivers/usb/acpi
						register "desc" = ""TypeC Port 1""
						device ref tcss_usb3_port1 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""TypeC Port 2""
						device ref tcss_usb3_port2 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""TypeC Port 3""
						device ref tcss_usb3_port3 on end
					end
				end
			end
		end
		device ref pmc hidden
			# The pmc_mux chip driver is a placeholder for the
			# PMC.MUX device in the ACPI hierarchy.
			chip drivers/intel/pmc_mux
				device generic 0 on
					chip drivers/intel/pmc_mux/conn
						register "usb2_port_number" = "1"
						register "usb3_port_number" = "1"
						# SBU is fixed, HSL follows CC
						register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
						device generic 0 alias conn0 on end
					end
					chip drivers/intel/pmc_mux/conn
						register "usb2_port_number" = "2"
						register "usb3_port_number" = "2"
						# SBU is fixed, HSL follows CC
						register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
						device generic 1 alias conn1 on end
					end
					chip drivers/intel/pmc_mux/conn
						register "usb2_port_number" = "3"
						register "usb3_port_number" = "3"
						# SBU is fixed, HSL follows CC
						register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
						device generic 2 alias conn2 on end
					end
				end
			end
		end
	end
end