skl mainboards/dt: Move genx_dec settings into LPC device scope
Change-Id: Iecb4851bedb7c9ed7793763d80acbcbb068e8832
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83172
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb
index d6bc990..f173e1e 100644
--- a/src/mainboard/libretrend/lt1000/devicetree.cb
+++ b/src/mainboard/libretrend/lt1000/devicetree.cb
@@ -25,10 +25,6 @@
register "gpe0_dw1" = "GPP_D"
register "gpe0_dw2" = "GPP_E"
- register "gen1_dec" = "0x007c0a01" # EC 0xa00-0xa7f
- register "gen2_dec" = "0x000c03e1" # COM3 port 0x3e0 - 0x3ef
- register "gen3_dec" = "0x00fc02e1" # COM2/4/5/6 ports 0x2e0 - 0x2ff
-
# Disable DPTF
register "dptf_enable" = "0"
@@ -173,6 +169,9 @@
device ref pcie_rp11 on end
device ref pcie_rp12 on end
device ref lpc_espi on
+ register "gen1_dec" = "0x007c0a01" # EC 0xa00-0xa7f
+ register "gen2_dec" = "0x000c03e1" # COM3 port 0x3e0 - 0x3ef
+ register "gen3_dec" = "0x00fc02e1" # COM2/4/5/6 ports 0x2e0 - 0x2ff
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end