| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright (C) 2008-2009 coresystems GmbH |
| ## |
| ## This program is free software; you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation; version 2 of the License. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| |
| config SOUTHBRIDGE_INTEL_I82801GX |
| bool |
| select ACPI_INTEL_HARDWARE_SLEEP_VALUES |
| select IOAPIC |
| select HAVE_USBDEBUG |
| select USE_WATCHDOG_ON_BOOT |
| select HAVE_SMI_HANDLER |
| select COMMON_FADT |
| select SOUTHBRIDGE_INTEL_COMMON_GPIO |
| select SOUTHBRIDGE_INTEL_COMMON_SMBUS |
| select SOUTHBRIDGE_INTEL_COMMON_SPI |
| select SOUTHBRIDGE_INTEL_COMMON_PMCLIB |
| select SOUTHBRIDGE_INTEL_COMMON_PMBASE |
| select HAVE_INTEL_CHIPSET_LOCKDOWN |
| select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ |
| select INTEL_HAS_TOP_SWAP |
| select SOUTHBRIDGE_INTEL_COMMON_SMM |
| select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG |
| select SOUTHBRIDGE_INTEL_COMMON_RTC |
| select SOUTHBRIDGE_INTEL_COMMON_RESET |
| |
| if SOUTHBRIDGE_INTEL_I82801GX |
| |
| config EHCI_BAR |
| hex |
| default 0xfef00000 |
| |
| config BOOTBLOCK_SOUTHBRIDGE_INIT |
| string |
| default "southbridge/intel/i82801gx/bootblock.c" |
| |
| config HPET_MIN_TICKS |
| hex |
| default 0x80 |
| |
| config INTEL_TOP_SWAP_BOOTBLOCK_SIZE |
| hex |
| # Always 64K, all other options are invalid |
| default 0x10000 |
| |
| endif |