commit d7205bebd53761e17e22701ca0573ffa5629d38e
author Kyösti Mälkki <kyosti.malkki@gmail.com> Fri Sep 27 07:24:17 2019 +0300
committer Kyösti Mälkki <kyosti.malkki@gmail.com> Sat Sep 28 21:15:27 2019 +0000
tree 3620a0040d5ae10a4cbce854c9025fb1d50a7016
parent 197a3c6cea86cb92c10c05c710dd4184c0e7ba72

nb,sb/intel: Clean up some __BOOTBLOCK__ and  __SIMPLE_DEVICE__ use

Change-Id: Ie3f3c043daa6ec18ed14929668e5acae172177b3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35603
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/northbridge/intel/haswell/haswell.h

diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index 55c0b4b..9de0cfb 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -208,24 +208,20 @@
 #ifndef __ASSEMBLER__
 static inline void barrier(void) { asm("" ::: "memory"); }
 
-#ifdef __SMM__
 void intel_northbridge_haswell_finalize_smm(void);
-#else /* !__SMM__ */
+
 void haswell_early_initialization(int chipset_type);
 void haswell_late_initialization(void);
 void set_translation_table(int start, int end, u64 base, int inc);
 void haswell_unhide_peg(void);
 
 void report_platform_info(void);
-#endif /* !__SMM__ */
 
-#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
 #include <device/device.h>
 
 struct acpi_rsdp;
 unsigned long northbridge_write_acpi_tables(struct device *device,
 		unsigned long start, struct acpi_rsdp *rsdp);
-#endif
 
 #endif
 #endif