nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use
Change-Id: Ie3f3c043daa6ec18ed14929668e5acae172177b3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35603
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.h b/src/northbridge/intel/fsp_rangeley/northbridge.h
index 160d754..8375fbf 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.h
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.h
@@ -63,9 +63,7 @@
u32 sideband_read(int port, int reg);
void sideband_write(int port, int reg, long data);
-#ifndef __SIMPLE_DEVICE__
void northbridge_acpi_fill_ssdt_generator(struct device *device);
-#endif
#endif /* #ifndef __ASSEMBLER__ */
#endif /* #ifndef __ACPI__ */
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
index 5d43758..430afe4 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
@@ -449,12 +449,10 @@
u16 get_blc_pwm_freq_value(const char *edid_ascii_string);
-#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
#include <device/device.h>
struct acpi_rsdp;
unsigned long northbridge_write_acpi_tables(struct device *device, unsigned long start, struct acpi_rsdp *rsdp);
-#endif
#endif /* !__ACPI__ */
#endif /* __NORTHBRIDGE_INTEL_GM45_GM45_H__ */
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index 55c0b4b..9de0cfb 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -208,24 +208,20 @@
#ifndef __ASSEMBLER__
static inline void barrier(void) { asm("" ::: "memory"); }
-#ifdef __SMM__
void intel_northbridge_haswell_finalize_smm(void);
-#else /* !__SMM__ */
+
void haswell_early_initialization(int chipset_type);
void haswell_late_initialization(void);
void set_translation_table(int start, int end, u64 base, int inc);
void haswell_unhide_peg(void);
void report_platform_info(void);
-#endif /* !__SMM__ */
-#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
#include <device/device.h>
struct acpi_rsdp;
unsigned long northbridge_write_acpi_tables(struct device *device,
unsigned long start, struct acpi_rsdp *rsdp);
-#endif
#endif
#endif
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index b488f2c..b598c9b 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -227,12 +227,10 @@
void perform_raminit(int s3resume);
enum platform_type get_platform_type(void);
-#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
#include <device/device.h>
struct acpi_rsdp;
unsigned long northbridge_write_acpi_tables(struct device *device, unsigned long start, struct acpi_rsdp *rsdp);
-#endif
#endif
#endif
diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h
index 5772336..05479a1 100644
--- a/src/northbridge/intel/x4x/x4x.h
+++ b/src/northbridge/intel/x4x/x4x.h
@@ -368,7 +368,6 @@
CTRL3,
};
-#ifndef __BOOTBLOCK__
void x4x_early_init(void);
void x4x_late_init(int s3resume);
u32 decode_igd_memory_size(u32 gms);
@@ -411,10 +410,9 @@
extern const u8 ddr3_c2_x264[3][6];
extern const u16 ddr3_c2_x23c[3][6];
+#include <device/device.h>
struct acpi_rsdp;
-#ifndef __SIMPLE_DEVICE__
unsigned long northbridge_write_acpi_tables(struct device *device,
unsigned long start, struct acpi_rsdp *rsdp);
-#endif /* __SIMPLE_DEVICE__ */
-#endif
+
#endif /* __NORTHBRIDGE_INTEL_X4X_H__ */