| commit | d4367505f18755e435cb5f578f169318c11f4b35 | [log] [tgz] |
|---|---|---|
| author | Furquan Shaikh <furquan@google.com> | Tue Oct 27 18:00:46 2020 -0700 |
| committer | Patrick Georgi <pgeorgi@google.com> | Mon Nov 02 06:14:12 2020 +0000 |
| tree | 9062d8c7456dae0a20d59cfff5dd9fe973e74a09 | |
| parent | 6017abbc2c725aeff2b916fe2d67f868b36f6f9d [diff] |
drivers/wifi/generic: Add support for CNVi dummy device ops This change reorganizes drivers/wifi/generic to add a new device_operations structure for dummy CNVi device. This is done to make the organization of CNVi PCI device in devicetree consistent with all the other internal PCI devices of the SoC i.e. without a chip around the PCI device. Thus, with this change, CNVi entry in devicetree can be changed from: ``` chip drivers/wifi/generic register "wake" = "xxyyzz" device pci xx.y on end # CNVi PCI device end ``` to: ``` device pci xx.y on chip drivers/wifi/generic register "wake" = "xxyyzz" device generic 0 on end # Dummy CNVi device end end # CNVi PCI device ``` The helper functions for ACPI/SMBIOS generation are also accordingly updated to include _pcie_ and _cnvi_ in the function name. Change-Id: Ib3cb9ed9b81ff8d6ac85a9aaf57b641caaa2f907 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46862 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.