| ## SPDX-License-Identifier: GPL-2.0-only | |
| config CPU_INTEL_SOCKET_FCBGA559 | |
| bool | |
| select CPU_INTEL_MODEL_106CX | |
| select CPU_HAS_L2_ENABLE_MSR | |
| help | |
| Select this socket on Intel Pineview | |
| if CPU_INTEL_SOCKET_FCBGA559 | |
| config DCACHE_RAM_BASE | |
| hex | |
| default 0xfefc0000 | |
| config DCACHE_RAM_SIZE | |
| hex | |
| default 0x8000 | |
| config PRERAM_CBFS_CACHE_SIZE | |
| default 0x0 | |
| config DCACHE_BSP_STACK_SIZE | |
| hex | |
| default 0x2000 | |
| help | |
| The amount of anticipated stack usage in CAR by bootblock and | |
| other stages. | |
| config MAX_CPUS | |
| int | |
| default 4 | |
| endif |