cpu/x86/mp_init: use cb_err as mp_init_with_smm return type
Using cb_err as return type clarifies the meaning of the different
return values. This patch also adds the types.h include that provides
the definition of the cb_err enum and checks the return value of
mp_init_with_smm against the enum values instead of either checking if
it's non-zero or less than zero to handle the error case.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ibcd4a9a63cc87fe176ba885ced0f00832587d492
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58491
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 90db95b..40f5ce0 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -17,6 +17,7 @@
#include <northbridge/intel/haswell/haswell.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <cpu/intel/common/common.h>
+#include <types.h>
#include "haswell.h"
#include "chip.h"
@@ -641,7 +642,7 @@
void mp_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
index fd6a82a..38d3735 100644
--- a/src/cpu/intel/model_1067x/mp_init.c
+++ b/src/cpu/intel/model_1067x/mp_init.c
@@ -7,6 +7,7 @@
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/common/common.h>
#include <device/device.h>
+#include <types.h>
/* Parallel MP initialization support. */
static void pre_mp_init(void)
@@ -97,6 +98,6 @@
void mp_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c
index f70d7b2..a31f2cb 100644
--- a/src/cpu/intel/model_2065x/model_2065x_init.c
+++ b/src/cpu/intel/model_2065x/model_2065x_init.c
@@ -19,6 +19,7 @@
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/common/common.h>
#include <smp/node.h>
+#include <types.h>
static void configure_thermal_target(void)
{
@@ -174,7 +175,7 @@
void mp_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index 09cad24..f3181cf 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -19,6 +19,7 @@
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/common/common.h>
#include <smbios.h>
+#include <types.h>
/* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */
static const u8 power_limit_time_sec_to_msr[] = {
@@ -430,7 +431,7 @@
void mp_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index 3efff2f1..258b9df 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -1096,9 +1096,9 @@
mp_state.ops.per_cpu_smm_trigger = smm_initiate_relocation;
}
-int mp_init_with_smm(struct bus *cpu_bus, const struct mp_ops *mp_ops)
+enum cb_err mp_init_with_smm(struct bus *cpu_bus, const struct mp_ops *mp_ops)
{
- int ret;
+ enum cb_err ret;
void *default_smm_area;
struct mp_params mp_params;
@@ -1111,7 +1111,7 @@
if (mp_state.cpu_count <= 0) {
printk(BIOS_ERR, "Invalid cpu_count: %d\n", mp_state.cpu_count);
- return -1;
+ return CB_ERR;
}
/* Sanity check SMM state. */
@@ -1133,14 +1133,12 @@
/* Perform backup of default SMM area. */
default_smm_area = backup_default_smm_area();
- /* TODO: Remove this return value translation after changing the return type of
- mp_init_with_smm to enum cb_err */
- ret = mp_init(cpu_bus, &mp_params) == CB_SUCCESS ? 0 : -1;
+ ret = mp_init(cpu_bus, &mp_params);
restore_default_smm_area(default_smm_area);
/* Signal callback on success if it's provided. */
- if (ret == 0 && mp_state.ops.post_mp_init != NULL)
+ if (ret == CB_SUCCESS && mp_state.ops.post_mp_init != NULL)
mp_state.ops.post_mp_init();
return ret;
diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h
index bc44415..aa6289c 100644
--- a/src/include/cpu/x86/mp.h
+++ b/src/include/cpu/x86/mp.h
@@ -5,8 +5,7 @@
#include <arch/smp/atomic.h>
#include <cpu/x86/smm.h>
-#include <stddef.h>
-#include <stdint.h>
+#include <types.h>
#define CACHELINE_SIZE 64
@@ -86,10 +85,9 @@
};
/*
- * mp_init_with_smm() returns < 0 on failure and 0 on success. The mp_ops
- * argument is used to drive the multiprocess initialization. Unless otherwise
- * stated each callback is called on the BSP only. The sequence of operations
- * is the following:
+ * The mp_ops argument is used to drive the multiprocess initialization. Unless
+ * otherwise stated each callback is called on the BSP only. The sequence of
+ * operations is the following:
* 1. pre_mp_init()
* 2. get_cpu_count()
* 3. get_smm_info()
@@ -103,7 +101,7 @@
* 10. mp_initialize_cpu() for each cpu
* 11. post_mp_init()
*/
-int mp_init_with_smm(struct bus *cpu_bus, const struct mp_ops *mp_ops);
+enum cb_err mp_init_with_smm(struct bus *cpu_bus, const struct mp_ops *mp_ops);
enum {
/* Function runs on all cores (both BSP and APs) */
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c
index 68410b0..b7630a1 100644
--- a/src/mainboard/emulation/qemu-i440fx/northbridge.c
+++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c
@@ -13,6 +13,7 @@
#include <stdlib.h>
#include <string.h>
#include <smbios.h>
+#include <types.h>
#include "memory.h"
#include "fw_cfg.h"
@@ -250,7 +251,7 @@
{
const struct mp_ops *ops = CONFIG(SMM_TSEG) ? &mp_ops_with_smm : &mp_ops_no_smm;
- if (mp_init_with_smm(cpu_bus, ops))
+ if (mp_init_with_smm(cpu_bus, ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c
index 2ac30b6..a2fa433 100644
--- a/src/soc/amd/cezanne/cpu.c
+++ b/src/soc/amd/cezanne/cpu.c
@@ -15,6 +15,7 @@
#include <device/device.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
+#include <types.h>
_Static_assert(CONFIG_MAX_CPUS == 16, "Do not override MAX_CPUS. To reduce the number of "
"available cores, use the downcore_mode and disable_smt devicetree settings instead.");
@@ -51,7 +52,7 @@
void mp_init_cpus(struct bus *cpu_bus)
{
/* Clear for take-off */
- if (mp_init_with_smm(cpu_bus, &mp_ops) < 0)
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* pre_mp_init made the flash not cacheable. Reset to WP for performance. */
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index b04d004..087b153 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -19,6 +19,7 @@
#include <soc/iomap.h>
#include <console/console.h>
#include <cpu/amd/microcode.h>
+#include <types.h>
_Static_assert(CONFIG_MAX_CPUS == 8, "Do not override MAX_CPUS. To reduce the number of "
"available cores, use the downcore_mode and disable_smt devicetree settings instead.");
@@ -55,7 +56,7 @@
void mp_init_cpus(struct bus *cpu_bus)
{
/* Clear for take-off */
- if (mp_init_with_smm(cpu_bus, &mp_ops) < 0)
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* pre_mp_init made the flash not cacheable. Reset to WP for performance. */
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index 9283ff7..08f5533 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -18,6 +18,7 @@
#include <soc/smi.h>
#include <soc/iomap.h>
#include <console/console.h>
+#include <types.h>
/*
* MP and SMM loading initialization.
@@ -53,7 +54,7 @@
void mp_init_cpus(struct bus *cpu_bus)
{
/* Clear for take-off */
- if (mp_init_with_smm(cpu_bus, &mp_ops) < 0)
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* The flash is now no longer cacheable. Reset to WP for performance. */
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c
index 801d10d..a437559 100644
--- a/src/soc/intel/alderlake/cpu.c
+++ b/src/soc/intel/alderlake/cpu.c
@@ -23,6 +23,7 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
+#include <types.h>
static void soc_fsp_load(void)
{
@@ -126,7 +127,7 @@
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index f2b14d7..645582b 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -28,6 +28,7 @@
#include <soc/iomap.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
+#include <types.h>
static const struct reg_script core_msr_script[] = {
#if !CONFIG(SOC_INTEL_GEMINILAKE)
@@ -250,7 +251,7 @@
void soc_init_cpus(struct bus *cpu_bus)
{
/* Clear for take-off */
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c
index e624240..8e40265 100644
--- a/src/soc/intel/baytrail/cpu.c
+++ b/src/soc/intel/baytrail/cpu.c
@@ -17,6 +17,7 @@
#include <soc/msr.h>
#include <soc/pattrs.h>
#include <soc/ramstage.h>
+#include <types.h>
/* Core level MSRs */
static const struct reg_script core_msr_script[] = {
@@ -196,6 +197,6 @@
{
struct bus *cpu_bus = dev->link_list;
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c
index 0c6f463..ead42b9 100644
--- a/src/soc/intel/braswell/cpu.c
+++ b/src/soc/intel/braswell/cpu.c
@@ -17,6 +17,7 @@
#include <soc/msr.h>
#include <soc/pattrs.h>
#include <soc/ramstage.h>
+#include <types.h>
/* Core level MSRs */
static const struct reg_script core_msr_script[] = {
@@ -205,6 +206,6 @@
{
struct bus *cpu_bus = dev->link_list;
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index 8c8cad0..23b944d 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -16,6 +16,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/common/common.h>
+#include <types.h>
#include "chip.h"
@@ -189,7 +190,7 @@
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c
index 6063548..ab4043b 100644
--- a/src/soc/intel/denverton_ns/cpu.c
+++ b/src/soc/intel/denverton_ns/cpu.c
@@ -20,6 +20,7 @@
#include <soc/iomap.h>
#include <soc/smm.h>
#include <soc/soc_util.h>
+#include <types.h>
static struct smm_relocation_attrs relo_attrs;
@@ -296,6 +297,6 @@
add_more_links(dev, 1);
/* Clear for take-off */
- if (mp_init_with_smm(dev->link_list, &mp_ops) < 0)
+ if (mp_init_with_smm(dev->link_list, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/intel/elkhartlake/cpu.c b/src/soc/intel/elkhartlake/cpu.c
index 0788c67..bfbb87f 100644
--- a/src/soc/intel/elkhartlake/cpu.c
+++ b/src/soc/intel/elkhartlake/cpu.c
@@ -16,6 +16,7 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
+#include <types.h>
static void soc_fsp_load(void)
{
@@ -117,7 +118,7 @@
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c
index 3ca2172..dea75b6 100644
--- a/src/soc/intel/icelake/cpu.c
+++ b/src/soc/intel/icelake/cpu.c
@@ -16,6 +16,7 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
+#include <types.h>
static void soc_fsp_load(void)
{
@@ -153,6 +154,6 @@
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/intel/jasperlake/cpu.c b/src/soc/intel/jasperlake/cpu.c
index a58fe55..18194c9 100644
--- a/src/soc/intel/jasperlake/cpu.c
+++ b/src/soc/intel/jasperlake/cpu.c
@@ -16,6 +16,7 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
+#include <types.h>
static void soc_fsp_load(void)
{
@@ -119,7 +120,7 @@
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 3abf19b..80bf251 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -22,6 +22,7 @@
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <soc/systemagent.h>
+#include <types.h>
#include "chip.h"
@@ -211,7 +212,7 @@
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/tigerlake/cpu.c b/src/soc/intel/tigerlake/cpu.c
index 084b5d6..f10f0cf 100644
--- a/src/soc/intel/tigerlake/cpu.c
+++ b/src/soc/intel/tigerlake/cpu.c
@@ -22,6 +22,7 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
+#include <types.h>
static void soc_fsp_load(void)
{
@@ -125,7 +126,7 @@
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/xeon_sp/cpx/cpu.c b/src/soc/intel/xeon_sp/cpx/cpu.c
index cfd9e5c..9746972 100644
--- a/src/soc/intel/xeon_sp/cpx/cpu.c
+++ b/src/soc/intel/xeon_sp/cpx/cpu.c
@@ -24,6 +24,7 @@
#include <soc/smmrelocate.h>
#include <soc/soc_util.h>
#include <soc/util.h>
+#include <types.h>
#include "chip.h"
@@ -211,7 +212,7 @@
intel_microcode_load_unlocked(microcode_patch);
- if (mp_init_with_smm(dev->link_list, &mp_ops) < 0)
+ if (mp_init_with_smm(dev->link_list, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/*
diff --git a/src/soc/intel/xeon_sp/skx/cpu.c b/src/soc/intel/xeon_sp/skx/cpu.c
index df2b9b3..4d01740 100644
--- a/src/soc/intel/xeon_sp/skx/cpu.c
+++ b/src/soc/intel/xeon_sp/skx/cpu.c
@@ -16,7 +16,7 @@
#include "chip.h"
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/em64t101_save_state.h>
-
+#include <types.h>
static const config_t *chip_config = NULL;
@@ -231,7 +231,7 @@
config_reset_cpl3_csrs();
/* calls src/cpu/x86/mp_init.c */
- if (mp_init_with_smm(dev->link_list, &mp_ops) < 0)
+ if (mp_init_with_smm(dev->link_list, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* update numa domain for all cpu devices */