siemens/mc_apl1: Provide baseboard and variant concepts
Siemens will provide further boards based on Apollo Lake. These differ
only slightly. To avoid copying the complete directory of the reference
board we simply create variants that only contain the differences, like
google/reef does.
To further the ability of multiple variant boards to share code provide
a place to land the split-up changes. This patch provides the tooling
by using a new Kconfig value, VARIANT_DIR, as well as the Make plumbing.
The directory layout with a single variant mc_apl1 (which is also the
baseboard) looks like this:
variants/baseboard - code
variants/baseboard/include/baseboard - headers
variants/mc_apl1 - code
variants/mc_apl1/include/variant - headers
New boards would then be added under their board name within the
'variants' directory.
No split has been done with providing different logic yet. This is
purely an organizational change.
Change-Id: Ia3c1f45daee3b9690a448b82edbeec552ee05973
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/25785
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
diff --git a/src/mainboard/siemens/mc_apl1/Kconfig b/src/mainboard/siemens/mc_apl1/Kconfig
index ae86894..44b81dc 100644
--- a/src/mainboard/siemens/mc_apl1/Kconfig
+++ b/src/mainboard/siemens/mc_apl1/Kconfig
@@ -1,28 +1,32 @@
-if BOARD_SIEMENS_MC_APL1
-config BOARD_SPECIFIC_OPTIONS
- def_bool y
+config BOARD_SIEMENS_BASEBOARD_MC_APL1
+ def_bool n
select SOC_INTEL_APOLLOLAKE
select BOARD_ROMSIZE_KB_16384
select HAVE_ACPI_TABLES
- select DRIVER_INTEL_I210
select USE_SIEMENS_HWILIB
select DRIVER_SIEMENS_NC_FPGA
- select DRIVERS_I2C_RX6110SA
- select DRIVERS_UART_8250IO
select APL_SKIP_SET_POWER_LIMITS
select NC_FPGA_NOTIFY_CB_READY
+source "src/mainboard/siemens/mc_apl1/variants/*/Kconfig"
+
+if BOARD_SIEMENS_BASEBOARD_MC_APL1
+
config MAINBOARD_DIR
string
default siemens/mc_apl1
+config VARIANT_DIR
+ string
+ default "mc_apl1" if BOARD_SIEMENS_MC_APL1
+
config MAINBOARD_PART_NUMBER
string
- default "MC APL1"
+ default "MC APL1" if BOARD_SIEMENS_MC_APL1
config MAX_CPUS
int
- default 4
+ default 8
-endif # BOARD_SIEMENS_MC_APL1
+endif # BOARD_SIEMENS_BASEBOARD_MC_APL1
diff --git a/src/mainboard/siemens/mc_apl1/Kconfig.name b/src/mainboard/siemens/mc_apl1/Kconfig.name
index bbc2a82..112bbb3 100644
--- a/src/mainboard/siemens/mc_apl1/Kconfig.name
+++ b/src/mainboard/siemens/mc_apl1/Kconfig.name
@@ -1,2 +1,3 @@
config BOARD_SIEMENS_MC_APL1
bool "MC APL1"
+ select BOARD_SIEMENS_BASEBOARD_MC_APL1
diff --git a/src/mainboard/siemens/mc_apl1/Makefile.inc b/src/mainboard/siemens/mc_apl1/Makefile.inc
index 223a45f..ec4d0ad 100644
--- a/src/mainboard/siemens/mc_apl1/Makefile.inc
+++ b/src/mainboard/siemens/mc_apl1/Makefile.inc
@@ -4,8 +4,12 @@
# It is put down only to the better understanding.
# The file is already included over src/arch/x86/Makefile.inc.
romstage-y += romstage.c
-romstage-y += gpio.c
ramstage-y += mainboard.c
-ramstage-y += gpio.c
ramstage-y += ptn3460.c
+
+subdirs-y += variants/baseboard
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
+
+subdirs-y += variants/$(VARIANT_DIR)
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
diff --git a/src/mainboard/siemens/mc_apl1/board_info.txt b/src/mainboard/siemens/mc_apl1/board_info.txt
index 01963ec..aa26105 100644
--- a/src/mainboard/siemens/mc_apl1/board_info.txt
+++ b/src/mainboard/siemens/mc_apl1/board_info.txt
@@ -1,4 +1,6 @@
+Vendor name: Siemens
Board name: MC APL1
Category: misc
ROM protocol: SPI
ROM socketed: no
+Flashrom support: yes
diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c
index 18cb660..ec110d8 100644
--- a/src/mainboard/siemens/mc_apl1/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/mainboard.c
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright 2016 Google Inc.
- * Copyright (C) 2017 Siemens AG
+ * Copyright (C) 2017-2018 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -32,7 +32,7 @@
#include <bootstate.h>
#include <timer.h>
#include <timestamp.h>
-#include "brd_gpio.h"
+#include <baseboard/variants.h>
#include "ptn3460.h"
#define MAX_PATH_DEPTH 12
@@ -194,7 +194,7 @@
const struct pad_config *pads;
size_t num;
- pads = brd_gpio_table(&num);
+ pads = variant_gpio_table(&num);
gpio_configure_pads(pads, num);
config_pmic_imon();
diff --git a/src/mainboard/siemens/mc_apl1/romstage.c b/src/mainboard/siemens/mc_apl1/romstage.c
index 24d03b6..d56c7ee 100644
--- a/src/mainboard/siemens/mc_apl1/romstage.c
+++ b/src/mainboard/siemens/mc_apl1/romstage.c
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright 2016 Google Inc.
- * Copyright (C) 2017 Siemens AG
+ * Copyright (C) 2017-2018 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,7 +21,7 @@
#include <soc/romstage.h>
#include <fsp/api.h>
#include <FspmUpd.h>
-#include "brd_gpio.h"
+#include <baseboard/variants.h>
static const uint8_t Ch0_Bit_swizzling[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -55,7 +55,7 @@
size_t num;
/* setup early gpio before memory */
- pads = brd_early_gpio_table(&num);
+ pads = variant_early_gpio_table(&num);
gpio_configure_pads(pads, num);
/* Get DRAM configuration data from hwinfo block.
diff --git a/src/mainboard/siemens/mc_apl1/variants/baseboard/Makefile.inc b/src/mainboard/siemens/mc_apl1/variants/baseboard/Makefile.inc
new file mode 100644
index 0000000..e3e87ce7
--- /dev/null
+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/Makefile.inc
@@ -0,0 +1,3 @@
+romstage-y += gpio.c
+
+ramstage-y += gpio.c
diff --git a/src/mainboard/siemens/mc_apl1/gpio.c b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
similarity index 98%
rename from src/mainboard/siemens/mc_apl1/gpio.c
rename to src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
index 636d356..10eb3d3 100644
--- a/src/mainboard/siemens/mc_apl1/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright 2016 Google Inc.
- * Copyright (C) 2017 Siemens AG
+ * Copyright (C) 2017-2018 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -14,10 +14,9 @@
* GNU General Public License for more details.
*/
-#include <soc/gpio.h>
#include <commonlib/helpers.h>
#include <compiler.h>
-#include "brd_gpio.h"
+#include <baseboard/variants.h>
/*
* Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'
@@ -364,7 +363,7 @@
PAD_CFG_NF(SVID0_CLK, UP_20K, DEEP, NF1), /* SVID0_CLK */
};
-const struct pad_config *__weak brd_gpio_table(size_t *num)
+const struct pad_config *__weak variant_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(gpio_table);
return gpio_table;
@@ -408,7 +407,7 @@
};
const struct pad_config *__weak
-brd_early_gpio_table(size_t *num)
+variant_early_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
diff --git a/src/mainboard/siemens/mc_apl1/brd_gpio.h b/src/mainboard/siemens/mc_apl1/variants/baseboard/include/baseboard/variants.h
similarity index 73%
rename from src/mainboard/siemens/mc_apl1/brd_gpio.h
rename to src/mainboard/siemens/mc_apl1/variants/baseboard/include/baseboard/variants.h
index 5cf07a6..8061d97 100644
--- a/src/mainboard/siemens/mc_apl1/brd_gpio.h
+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/include/baseboard/variants.h
@@ -2,7 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2015-2016 Intel Corporation. All Rights Reserved.
- * Copyright (C) 2017 Siemens AG
+ * Copyright (C) 2018 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -14,8 +14,8 @@
* GNU General Public License for more details.
*/
-#ifndef _BRD_GPIO_H_
-#define _BRD_GPIO_H_
+#ifndef _BASEBOARD_VARIANTS_H_
+#define _BASEBOARD_VARIANTS_H_
#include <soc/gpio.h>
@@ -23,7 +23,7 @@
* The next set of functions return the gpio table and fill in the number of
* entries for each table.
*/
-const struct pad_config *brd_gpio_table(size_t *num);
-const struct pad_config *brd_early_gpio_table(size_t *num);
+const struct pad_config *variant_gpio_table(size_t *num);
+const struct pad_config *variant_early_gpio_table(size_t *num);
-#endif /* _BRD_GPIO_H_ */
+#endif /* _BASEBOARD_VARIANTS_H_ */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig
new file mode 100644
index 0000000..ae72d9e
--- /dev/null
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig
@@ -0,0 +1,14 @@
+
+if BOARD_SIEMENS_MC_APL1
+
+config BOARD_SIEMENS_MC_APL1_VAR
+ def_bool y
+ select DRIVER_INTEL_I210
+ select DRIVERS_I2C_RX6110SA
+ select DRIVERS_UART_8250IO
+
+config DEVICETREE
+ string
+ default "variants/mc_apl1/devicetree.cb"
+
+endif # BOARD_SIEMENS_MC_APL1
diff --git a/src/mainboard/siemens/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
similarity index 100%
rename from src/mainboard/siemens/mc_apl1/devicetree.cb
rename to src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb