devicetree: Discriminate device ops scan_bus()
Use of scan_static_bus() and tree traversals is somewhat convoluted.
Start cleaning this up by assigning each path type with separate
static scan_bus() function.
For ME, SMBus and LPC paths a bus cannot expose bridges, as those would
add to the number of encountered PCI buses.
Change-Id: I8bb11450516faad4fa33b8f69bce5b9978ec75e5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8534
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index c1bc45f..fec0d5c 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -827,7 +827,7 @@
.init = lpc_init,
.final = lpc_final,
.enable = pch_lpc_enable,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index ed25e44..ab3d475 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -760,7 +760,6 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = intel_me_init,
- .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 75e517f..6bd26c4 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -763,7 +763,6 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = intel_me_init,
- .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 94546a7..0198841 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -151,7 +151,7 @@
.read_resources = smbus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.init = pch_smbus_init,
.ops_smbus_bus = &lops_smbus_bus,
.ops_pci = &smbus_pci_ops,
diff --git a/src/southbridge/intel/esb6300/lpc.c b/src/southbridge/intel/esb6300/lpc.c
index 22bb150..e1718bb 100644
--- a/src/southbridge/intel/esb6300/lpc.c
+++ b/src/southbridge/intel/esb6300/lpc.c
@@ -362,7 +362,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = esb6300_lpc_enable_resources,
.init = lpc_init,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.enable = esb6300_enable,
.ops_pci = &lops_pci,
};
diff --git a/src/southbridge/intel/esb6300/smbus.c b/src/southbridge/intel/esb6300/smbus.c
index 92cb288..2c026b8 100644
--- a/src/southbridge/intel/esb6300/smbus.c
+++ b/src/southbridge/intel/esb6300/smbus.c
@@ -35,7 +35,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.enable = esb6300_enable,
.ops_pci = &lops_pci,
.ops_smbus_bus = &lops_smbus_bus,
diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c
index 1d92532..b410332 100644
--- a/src/southbridge/intel/fsp_bd82x6x/lpc.c
+++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c
@@ -761,7 +761,7 @@
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.init = lpc_init,
.enable = pch_lpc_enable,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/fsp_bd82x6x/me.c b/src/southbridge/intel/fsp_bd82x6x/me.c
index ab6ae09..8f65da3 100644
--- a/src/southbridge/intel/fsp_bd82x6x/me.c
+++ b/src/southbridge/intel/fsp_bd82x6x/me.c
@@ -759,7 +759,6 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = intel_me_init,
- .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c
index 5e7b661..292dbba 100644
--- a/src/southbridge/intel/fsp_bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/fsp_bd82x6x/me_8.x.c
@@ -762,7 +762,6 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = intel_me_init,
- .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index 3aee7ed..22de62d 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -463,7 +463,7 @@
.write_acpi_tables = acpi_write_hpet,
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.enable = soc_lpc_enable,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/fsp_rangeley/smbus.c b/src/southbridge/intel/fsp_rangeley/smbus.c
index 8368afe..7864b1e 100644
--- a/src/southbridge/intel/fsp_rangeley/smbus.c
+++ b/src/southbridge/intel/fsp_rangeley/smbus.c
@@ -87,7 +87,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.ops_smbus_bus = &lops_smbus_bus,
.ops_pci = &smbus_pci_ops,
};
diff --git a/src/southbridge/intel/i3100/lpc.c b/src/southbridge/intel/i3100/lpc.c
index b29180c..aef855f 100644
--- a/src/southbridge/intel/i3100/lpc.c
+++ b/src/southbridge/intel/i3100/lpc.c
@@ -457,7 +457,7 @@
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.write_acpi_tables = acpi_write_hpet,
#endif
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.enable = i3100_enable,
.ops_pci = &lops_pci,
};
diff --git a/src/southbridge/intel/i3100/smbus.c b/src/southbridge/intel/i3100/smbus.c
index 445b668..2feb00f 100644
--- a/src/southbridge/intel/i3100/smbus.c
+++ b/src/southbridge/intel/i3100/smbus.c
@@ -74,7 +74,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.enable = i3100_enable,
.ops_pci = &lops_pci,
.ops_smbus_bus = &lops_smbus_bus,
diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c
index 1945fae..024604b 100644
--- a/src/southbridge/intel/i82371eb/isa.c
+++ b/src/southbridge/intel/i82371eb/isa.c
@@ -145,7 +145,7 @@
.acpi_fill_ssdt_generator = southbridge_acpi_fill_ssdt_generator,
#endif
.init = isa_init,
- .scan_bus = scan_static_bus, /* TODO: Needed? */
+ .scan_bus = scan_lpc_bus, /* TODO: Needed? */
.enable = 0,
.ops_pci = 0, /* No subsystem IDs on 82371EB! */
};
diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c
index 82647e1..3817357 100644
--- a/src/southbridge/intel/i82371eb/smbus.c
+++ b/src/southbridge/intel/i82371eb/smbus.c
@@ -121,7 +121,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.enable = pwrmgt_enable,
.ops_pci = 0, /* No subsystem IDs on 82371EB! */
.ops_smbus_bus = &lops_smbus_bus,
diff --git a/src/southbridge/intel/i82801ax/lpc.c b/src/southbridge/intel/i82801ax/lpc.c
index 4bd69d6..e960551 100644
--- a/src/southbridge/intel/i82801ax/lpc.c
+++ b/src/southbridge/intel/i82801ax/lpc.c
@@ -286,7 +286,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.enable = i82801ax_enable,
};
diff --git a/src/southbridge/intel/i82801ax/smbus.c b/src/southbridge/intel/i82801ax/smbus.c
index cbe9e4a..76a78d1 100644
--- a/src/southbridge/intel/i82801ax/smbus.c
+++ b/src/southbridge/intel/i82801ax/smbus.c
@@ -48,7 +48,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.enable = i82801ax_enable,
.ops_smbus_bus = &lops_smbus_bus,
};
diff --git a/src/southbridge/intel/i82801bx/lpc.c b/src/southbridge/intel/i82801bx/lpc.c
index edadf40..7247cdc 100644
--- a/src/southbridge/intel/i82801bx/lpc.c
+++ b/src/southbridge/intel/i82801bx/lpc.c
@@ -304,7 +304,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.enable = i82801bx_enable,
};
diff --git a/src/southbridge/intel/i82801bx/smbus.c b/src/southbridge/intel/i82801bx/smbus.c
index 8feb75b..836c256 100644
--- a/src/southbridge/intel/i82801bx/smbus.c
+++ b/src/southbridge/intel/i82801bx/smbus.c
@@ -48,7 +48,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.enable = i82801bx_enable,
.ops_smbus_bus = &lops_smbus_bus,
};
diff --git a/src/southbridge/intel/i82801cx/lpc.c b/src/southbridge/intel/i82801cx/lpc.c
index 22671c3..a348c95 100644
--- a/src/southbridge/intel/i82801cx/lpc.c
+++ b/src/southbridge/intel/i82801cx/lpc.c
@@ -230,7 +230,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.enable = 0,
};
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c
index 9f2a23f..29a457a 100644
--- a/src/southbridge/intel/i82801dx/lpc.c
+++ b/src/southbridge/intel/i82801dx/lpc.c
@@ -336,7 +336,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.enable = i82801dx_enable,
};
diff --git a/src/southbridge/intel/i82801ex/lpc.c b/src/southbridge/intel/i82801ex/lpc.c
index 0a2f6e3..630484a 100644
--- a/src/southbridge/intel/i82801ex/lpc.c
+++ b/src/southbridge/intel/i82801ex/lpc.c
@@ -369,7 +369,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = i82801ex_lpc_enable_resources,
.init = lpc_init,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.enable = i82801ex_enable,
.ops_pci = &lops_pci,
};
diff --git a/src/southbridge/intel/i82801ex/smbus.c b/src/southbridge/intel/i82801ex/smbus.c
index fe49e11..75ea119 100644
--- a/src/southbridge/intel/i82801ex/smbus.c
+++ b/src/southbridge/intel/i82801ex/smbus.c
@@ -35,7 +35,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.enable = i82801ex_enable,
.ops_pci = &lops_pci,
.ops_smbus_bus = &lops_smbus_bus,
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index bf61855..5ff8c24 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -667,7 +667,7 @@
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
.init = lpc_init,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.enable = i82801gx_enable,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c
index 585d16c..e556d72 100644
--- a/src/southbridge/intel/i82801gx/smbus.c
+++ b/src/southbridge/intel/i82801gx/smbus.c
@@ -258,7 +258,7 @@
.read_resources = smbus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.enable = i82801gx_enable,
.ops_smbus_bus = &lops_smbus_bus,
.ops_pci = &smbus_pci_ops,
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 3cc053b..8713e55 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -582,7 +582,7 @@
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
.init = lpc_init,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/i82801ix/smbus.c b/src/southbridge/intel/i82801ix/smbus.c
index 635cb19..9ae267d 100644
--- a/src/southbridge/intel/i82801ix/smbus.c
+++ b/src/southbridge/intel/i82801ix/smbus.c
@@ -101,7 +101,7 @@
.read_resources = smbus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.init = pch_smbus_init,
.ops_smbus_bus = &lops_smbus_bus,
.ops_pci = &smbus_pci_ops,
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index f066b35..e46bea6 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -805,7 +805,7 @@
.write_acpi_tables = acpi_write_hpet,
.init = lpc_init,
.enable = pch_lpc_enable,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c
index e68bb01..96e16e3 100644
--- a/src/southbridge/intel/ibexpeak/me.c
+++ b/src/southbridge/intel/ibexpeak/me.c
@@ -634,7 +634,6 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = intel_me_init,
- .scan_bus = scan_static_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c
index 085aec0..2bb4cbf 100644
--- a/src/southbridge/intel/ibexpeak/smbus.c
+++ b/src/southbridge/intel/ibexpeak/smbus.c
@@ -108,7 +108,7 @@
.read_resources = smbus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.init = pch_smbus_init,
.ops_smbus_bus = &lops_smbus_bus,
.ops_pci = &smbus_pci_ops,
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index c055da5..4b7de54 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -834,7 +834,7 @@
.write_acpi_tables = southbridge_write_acpi_tables,
.init = lpc_init,
.enable = pch_lpc_enable,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c
index ae16a92..b7c8503 100644
--- a/src/southbridge/intel/lynxpoint/smbus.c
+++ b/src/southbridge/intel/lynxpoint/smbus.c
@@ -155,7 +155,7 @@
.read_resources = smbus_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.init = pch_smbus_init,
.ops_smbus_bus = &lops_smbus_bus,
.ops_pci = &smbus_pci_ops,
diff --git a/src/southbridge/intel/sch/lpc.c b/src/southbridge/intel/sch/lpc.c
index e40b051..e961e4f 100644
--- a/src/southbridge/intel/sch/lpc.c
+++ b/src/southbridge/intel/sch/lpc.c
@@ -222,7 +222,7 @@
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
.init = lpc_init,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_lpc_bus,
.ops_pci = &pci_ops,
};
diff --git a/src/southbridge/intel/sch/smbus.c b/src/southbridge/intel/sch/smbus.c
index d208fcc..c3bff67 100644
--- a/src/southbridge/intel/sch/smbus.c
+++ b/src/southbridge/intel/sch/smbus.c
@@ -65,7 +65,7 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = 0,
- .scan_bus = scan_static_bus,
+ .scan_bus = scan_smbus,
.ops_smbus_bus = &lops_smbus_bus,
.ops_pci = &smbus_pci_ops,
};