coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 6c967ad..f58d362 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -384,7 +384,7 @@
if (ps->pm1_sts & WAK_STS) {
switch (acpi_sleep_from_pm1(ps->pm1_cnt)) {
case ACPI_S3:
- if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME))
+ if (CONFIG(HAVE_ACPI_RESUME))
prev_sleep_state = ACPI_S3;
break;
case ACPI_S5:
@@ -432,7 +432,7 @@
return ps->prev_sleep_state;
}
-#if IS_ENABLED(CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK)
+#if CONFIG(PMC_GLOBAL_RESET_ENABLE_LOCK)
/*
* If possible, lock 0xcf9. Once the register is locked, it can't be changed.
* This lock is reset on cold boot, hard reset, soft reset and Sx.