coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
diff --git a/src/drivers/pc80/pc/i8254.c b/src/drivers/pc80/pc/i8254.c
index 27c7bfd..4b81d58 100644
--- a/src/drivers/pc80/pc/i8254.c
+++ b/src/drivers/pc80/pc/i8254.c
@@ -31,7 +31,7 @@
outb(0x12, TIMER1_PORT);
}
-#if IS_ENABLED(CONFIG_UDELAY_TIMER2)
+#if CONFIG(UDELAY_TIMER2)
static void load_timer2(unsigned int ticks)
{
/* Set up the timer gate, turn off the speaker */
diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c
index 3b22a46..c18f1e94 100644
--- a/src/drivers/pc80/rtc/mc146818rtc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc.c
@@ -30,7 +30,7 @@
#include <security/vboot/vbnv_layout.h>
/* There's no way around this include guard. option_table.h is autogenerated */
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
#include "option_table.h"
#else
#define LB_CKS_RANGE_START 0
@@ -41,7 +41,7 @@
#include <smp/spinlock.h>
#if (defined(__PRE_RAM__) && \
-IS_ENABLED(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK))
+CONFIG(HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK))
#define LOCK_NVRAM_CBFS_SPINLOCK() spin_lock(romstage_nvram_cbfs_lock())
#define UNLOCK_NVRAM_CBFS_SPINLOCK() spin_unlock(romstage_nvram_cbfs_lock())
#else
@@ -70,7 +70,7 @@
int i;
u16 sum, old_sum;
- if (IS_ENABLED(CONFIG_STATIC_OPTION_TABLE))
+ if (CONFIG(STATIC_OPTION_TABLE))
return 1;
sum = 0;
@@ -122,7 +122,7 @@
x = cmos_read(RTC_VALID);
cmos_invalid = !(x & RTC_VRT);
- if (IS_ENABLED(CONFIG_USE_OPTION_TABLE)) {
+ if (CONFIG(USE_OPTION_TABLE)) {
/* See if there is a CMOS checksum error */
checksum_invalid = !cmos_checksum_valid(PC_CKS_RANGE_START,
PC_CKS_RANGE_END, PC_CKS_LOC);
@@ -162,7 +162,7 @@
/* Ensure all reserved bits are 0 in register D */
cmos_write(RTC_VRT, RTC_VALID);
- if (IS_ENABLED(CONFIG_USE_OPTION_TABLE)) {
+ if (CONFIG(USE_OPTION_TABLE)) {
/* See if there is a LB CMOS checksum error */
checksum_invalid = !cmos_checksum_valid(LB_CKS_RANGE_START,
LB_CKS_RANGE_END, LB_CKS_LOC);
@@ -196,7 +196,7 @@
void cmos_init(bool invalid)
{
- if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS))
+ if (CONFIG(VBOOT_VBNV_CMOS))
cmos_init_vbnv(invalid);
else
__cmos_init(invalid);
@@ -272,7 +272,7 @@
size_t namelen;
int found = 0;
- if (!IS_ENABLED(CONFIG_USE_OPTION_TABLE))
+ if (!CONFIG(USE_OPTION_TABLE))
return CB_CMOS_OTABLE_DISABLED;
LOCK_NVRAM_CBFS_SPINLOCK();
@@ -370,7 +370,7 @@
{
printk(BIOS_NOTICE, "NOTICE: read_option() used to access CMOS "
"from non-ROMCC code, please use get_option() instead.\n");
- if (IS_ENABLED(CONFIG_USE_OPTION_TABLE)) {
+ if (CONFIG(USE_OPTION_TABLE)) {
const unsigned char byte = cmos_read(start / 8);
return (byte >> (start & 7U)) & ((1U << size) - 1U);
}
@@ -386,7 +386,7 @@
size_t namelen;
int found = 0;
- if (!IS_ENABLED(CONFIG_USE_OPTION_TABLE))
+ if (!CONFIG(USE_OPTION_TABLE))
return CB_CMOS_OTABLE_DISABLED;
/* Figure out how long name is */
@@ -506,7 +506,7 @@
byte = inb(RTC_PORT(1));
- if (IS_ENABLED(CONFIG_SKIP_MAX_REBOOT_CNT_CLEAR)) {
+ if (CONFIG(SKIP_MAX_REBOOT_CNT_CLEAR)) {
/*
* Set the fallback boot bit to allow for recovery if
* the payload fails to boot.
diff --git a/src/drivers/pc80/rtc/mc146818rtc_boot.c b/src/drivers/pc80/rtc/mc146818rtc_boot.c
index c5cd86c..26bcac5 100644
--- a/src/drivers/pc80/rtc/mc146818rtc_boot.c
+++ b/src/drivers/pc80/rtc/mc146818rtc_boot.c
@@ -18,7 +18,7 @@
#include <cbfs.h>
#endif
#include <pc80/mc146818rtc.h>
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
#include <option_table.h>
#endif
@@ -34,7 +34,7 @@
int cmos_chksum_valid(void);
int cmos_chksum_valid(void)
{
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
unsigned char addr;
u16 sum, old_sum;
@@ -53,11 +53,11 @@
#endif
}
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
void sanitize_cmos(void)
{
if (cmos_error() || !cmos_chksum_valid() ||
- IS_ENABLED(CONFIG_STATIC_OPTION_TABLE)) {
+ CONFIG(STATIC_OPTION_TABLE)) {
size_t length = 128;
const unsigned char *cmos_default =
#ifdef __ROMCC__
diff --git a/src/drivers/pc80/rtc/mc146818rtc_romcc.c b/src/drivers/pc80/rtc/mc146818rtc_romcc.c
index a280882..eb8bf00 100644
--- a/src/drivers/pc80/rtc/mc146818rtc_romcc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc_romcc.c
@@ -63,7 +63,7 @@
unsigned read_option_lowlevel(unsigned start, unsigned size, unsigned def)
{
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
unsigned byte;
byte = cmos_read(start/8);
diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c
index d7925bc..e10332b 100644
--- a/src/drivers/pc80/tpm/tis.c
+++ b/src/drivers/pc80/tpm/tis.c
@@ -45,7 +45,7 @@
#define TPM_MCI_UUID "376054ed-cc13-4675-901c-4756d7f2d45d"
/* coreboot wrapper for TPM driver (start) */
#define TPM_DEBUG(fmt, args...) \
- if (IS_ENABLED(CONFIG_DEBUG_TPM)) { \
+ if (CONFIG(DEBUG_TPM)) { \
printk(BIOS_DEBUG, PREFIX); \
printk(BIOS_DEBUG, fmt, ##args); \
}
@@ -126,7 +126,7 @@
static const struct device_name infineon_devices[] = {
{0x000b, "SLB9635 TT 1.2"},
-#if IS_ENABLED(CONFIG_TPM2)
+#if CONFIG(TPM2)
{0x001a, "SLB9665 TT 2.0"},
{0x001b, "SLB9670 TT 2.0"},
#else
@@ -602,7 +602,7 @@
* and tis_has_valid_data(), or some race-condition-related
* issue will occur.
*/
- if (IS_ENABLED(CONFIG_TPM_RDRESP_NEED_DELAY))
+ if (CONFIG(TPM_RDRESP_NEED_DELAY))
udelay(10);
} while (tis_has_valid_data(locality));
@@ -783,7 +783,7 @@
}
}
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
static void tpm_ppi_func0_cb(void *arg)
{
@@ -794,7 +794,7 @@
static void tpm_ppi_func1_cb(void *arg)
{
- if (IS_ENABLED(CONFIG_TPM2))
+ if (CONFIG(TPM2))
/* Interface version: 2.0 */
acpigen_write_return_string("2.0");
else
@@ -942,7 +942,7 @@
acpigen_write_resourcetemplate_footer();
- if (!IS_ENABLED(CONFIG_CHROMEOS)) {
+ if (!CONFIG(CHROMEOS)) {
/*
* _DSM method
*/
@@ -981,7 +981,7 @@
static struct device_operations lpc_tpm_ops = {
.read_resources = lpc_tpm_read_resources,
.set_resources = lpc_tpm_set_resources,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
.acpi_name = lpc_tpm_acpi_name,
.acpi_fill_ssdt_generator = lpc_tpm_fill_ssdt,
#endif