blob: 9dfbfe2e3dbf4950554bbda3c5431178514b590b [file] [log] [blame]
/* SPDX-License-Identifier: GPL-2.0-only */
#include <assert.h>
#include <soc/romstage.h>
#include <spd_bin.h>
#include <stdint.h>
#include <string.h>
void mainboard_memory_init_params(FSPM_UPD *mupd)
{
const u16 rcomp_resistors[3] = { 121, 75, 100 };
const u16 rcomp_targets[5] = { 50, 26, 20, 20, 26 };
FSP_M_CONFIG *const mem_cfg = &mupd->FspmConfig;
struct spd_block blk = {
.addr_map = { 0x50, 0x52 },
};
assert(sizeof(mem_cfg->RcompResistor) == sizeof(rcomp_resistors));
assert(sizeof(mem_cfg->RcompTarget) == sizeof(rcomp_targets));
mem_cfg->DqPinsInterleaved = 1;
mem_cfg->CaVrefConfig = 2;
get_spd_smbus(&blk);
mem_cfg->MemorySpdDataLen = blk.len;
mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0];
mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1];
dump_spd_info(&blk);
memcpy(mem_cfg->RcompResistor, rcomp_resistors, sizeof(mem_cfg->RcompResistor));
memcpy(mem_cfg->RcompTarget, rcomp_targets, sizeof(mem_cfg->RcompTarget));
/* use virtual channel 1 for the dmi interface of the PCH */
mupd->FspmTestConfig.DmiVc1 = 1;
}