blob: 9a2c030f600f53fe78086444bd8203c5e2fd5b5a [file] [log] [blame]
##
## This file is part of the coreboot project.
##
## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
target s1846
mainboard tyan/s1846
option CONFIG_ROM_SIZE = 256 * 1024
option CONFIG_MAINBOARD_VENDOR = "Tyan"
option CONFIG_MAINBOARD_PART_NUMBER = "S1846"
# TODO: Add/fix PIRQ table.
option CONFIG_GENERATE_PIRQ_TABLE = 0
option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
option CONFIG_CONSOLE_VGA = 1
option CONFIG_PCI_ROM_RUN = 1
romimage "normal"
option CONFIG_USE_FALLBACK_IMAGE = 0
option COREBOOT_EXTRA_VERSION = ".0Normal"
payload /tmp/filo.elf
end
romimage "fallback"
option CONFIG_USE_FALLBACK_IMAGE = 1
option COREBOOT_EXTRA_VERSION = ".0Fallback"
payload /tmp/filo.elf
end
buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"