| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright (C) 2013 Google Inc. |
| ## Copyright (C) 2015-2016 Intel Corp. |
| ## |
| ## This program is free software; you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation; version 2 of the License. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| |
| chip soc/intel/quark |
| |
| device domain 0 on |
| # EDS Table 3 |
| device pci 00.0 on end # 8086 0958 - Host Bridge |
| device pci 1f.0 on end # 8086 095e - Legacy Bridge |
| end |
| end |