| chip soc/intel/broadwell |
| |
| # Enable eDP Hotplug with 6ms pulse |
| register "gpu_dp_d_hotplug" = "0x06" |
| |
| # Enable DDI1 Hotplug with 6ms pulse |
| register "gpu_dp_b_hotplug" = "0x06" |
| |
| register "panel_cfg" = "{ |
| .up_delay_ms = 200, |
| .down_delay_ms = 50, |
| .cycle_delay_ms = 500, |
| .backlight_on_delay_ms = 200, |
| .backlight_off_delay_ms = 200, |
| .backlight_pwm_hz = 200, |
| }" |
| |
| device cpu_cluster 0 on |
| chip cpu/intel/haswell |
| device lapic 0 on end |
| device lapic 0xacac off end |
| end |
| end |
| device domain 0 on |
| device pci 00.0 on end # host bridge |
| device pci 02.0 on end # vga controller |
| device pci 03.0 on end # mini-hd audio |
| |
| chip soc/intel/broadwell/pch |
| # EC host command ranges are in 0x380-0x383 & 0x80-0x8f |
| register "gen1_dec" = "0x00000381" |
| |
| device pci 13.0 off end # Smart Sound Audio DSP |
| device pci 14.0 on end # USB3 XHCI |
| device pci 15.0 off end # Serial I/O DMA |
| device pci 15.1 off end # I2C0 |
| device pci 15.2 off end # I2C1 |
| device pci 15.3 off end # GSPI0 |
| device pci 15.4 off end # GSPI1 |
| device pci 15.5 off end # UART0 |
| device pci 15.6 off end # UART1 |
| device pci 16.0 off end # Management Engine Interface 1 |
| device pci 16.1 off end # Management Engine Interface 2 |
| device pci 16.2 off end # Management Engine IDE-R |
| device pci 16.3 off end # Management Engine KT |
| device pci 17.0 off end # SDIO |
| device pci 19.0 off end # GbE |
| device pci 1b.0 on end # High Definition Audio |
| device pci 1c.0 on end # PCIe Port #1 |
| device pci 1c.1 off end # PCIe Port #2 |
| device pci 1c.2 off end # PCIe Port #3 - LAN |
| device pci 1c.3 on end # PCIe Port #4 - WiFi |
| device pci 1c.4 on end # PCIe Port #5 |
| device pci 1c.5 on end # PCIe Port #6 - M.2 NVMe |
| device pci 1d.0 off end # USB2 EHCI |
| device pci 1e.0 off end # PCI bridge |
| device pci 1f.0 on end # LPC bridge |
| device pci 1f.2 on end # SATA Controller |
| device pci 1f.3 on end # SMBus |
| device pci 1f.6 off end # Thermal |
| end |
| end |
| end |