| ## SPDX-License-Identifier: GPL-2.0-only |
| |
| menu "Devices" |
| |
| config HAVE_VGA_TEXT_FRAMEBUFFER |
| bool |
| depends on !(NO_GFX_INIT && NO_EARLY_GFX_INIT) |
| help |
| Selected by graphics drivers that support legacy VGA text mode. |
| |
| config HAVE_VBE_LINEAR_FRAMEBUFFER |
| bool |
| depends on !NO_GFX_INIT |
| help |
| Selected by graphics drivers that can set up a VBE linear-framebuffer |
| mode. |
| |
| config HAVE_LINEAR_FRAMEBUFFER |
| bool |
| depends on !NO_GFX_INIT |
| help |
| Selected by graphics drivers that can set up a generic linear |
| framebuffer. |
| |
| config HAVE_FSP_GOP |
| bool |
| help |
| Selected by drivers that support to run a blob that implements |
| the Graphics Output Protocol (GOP). |
| |
| config MAINBOARD_NO_FSP_GOP |
| bool |
| help |
| Selected by mainboards that do not have any graphics ports connected to the SoC. |
| |
| config MAINBOARD_HAS_NATIVE_VGA_INIT |
| def_bool n |
| help |
| Selected by mainboards / drivers that provide native graphics |
| init within coreboot. |
| |
| config MAINBOARD_FORCE_NATIVE_VGA_INIT |
| def_bool n |
| depends on MAINBOARD_HAS_NATIVE_VGA_INIT || MAINBOARD_HAS_LIBGFXINIT |
| help |
| Selected by mainboards / chipsets whose graphics driver can't or |
| shouldn't be disabled. |
| |
| config VGA_ROM_RUN_DEFAULT |
| def_bool n |
| help |
| Selected by mainboards whose graphics initialization depends on VGA OpROM. |
| coreboot needs to load/execute legacy VGA OpROM in order to initialize GFX. |
| |
| config MAINBOARD_HAS_LIBGFXINIT |
| def_bool n |
| help |
| Selected by mainboards that implement support for `libgfxinit`. |
| Usually this requires a list of ports to be probed for displays. |
| |
| config MAINBOARD_HAS_EARLY_LIBGFXINIT |
| def_bool n |
| help |
| Selected by mainboards that implement early (cache-as-ram |
| stage) support of `libgfxinit`. Usually this requires a list |
| of ports to be probed for displays. |
| |
| choice |
| prompt "Graphics initialization" |
| default NO_GFX_INIT if VGA_ROM_RUN_DEFAULT && PAYLOAD_SEABIOS |
| default VGA_ROM_RUN if VGA_ROM_RUN_DEFAULT |
| default MAINBOARD_DO_NATIVE_VGA_INIT |
| default MAINBOARD_USE_LIBGFXINIT |
| default RUN_FSP_GOP if INTEL_GMA_HAVE_VBT |
| |
| config MAINBOARD_DO_NATIVE_VGA_INIT |
| bool "Use native graphics init" |
| depends on MAINBOARD_HAS_NATIVE_VGA_INIT |
| help |
| Some mainboards, such as the Google Link, allow initializing the |
| display without the need of a binary only VGA OPROM. Enabling this |
| option may be faster, but also lacks flexibility in setting modes. |
| |
| config MAINBOARD_USE_LIBGFXINIT |
| bool "Use libgfxinit" |
| depends on MAINBOARD_HAS_LIBGFXINIT |
| select HAVE_VGA_TEXT_FRAMEBUFFER |
| select HAVE_LINEAR_FRAMEBUFFER |
| select VGA if VGA_TEXT_FRAMEBUFFER |
| help |
| Use the SPARK library `libgfxinit` for the native graphics |
| initialization. This requires an Ada toolchain. |
| |
| # TODO: Explain differences (if any) for onboard cards. |
| config VGA_ROM_RUN |
| bool "Run VGA Option ROMs" |
| depends on PCI && (ARCH_X86 || ARCH_PPC64) && !MAINBOARD_FORCE_NATIVE_VGA_INIT |
| select HAVE_VGA_TEXT_FRAMEBUFFER |
| help |
| Execute VGA Option ROMs in coreboot if found. This can be used |
| to enable PCI/AGP/PCI-E video cards when not using a SeaBIOS |
| payload. |
| |
| When using a SeaBIOS payload it runs all option ROMs with much |
| more complete BIOS interrupt services available than coreboot, |
| which some option ROMs require in order to function correctly. |
| |
| config RUN_FSP_GOP |
| bool "Run a GOP driver" |
| depends on HAVE_FSP_GOP && !MAINBOARD_NO_FSP_GOP |
| select HAVE_LINEAR_FRAMEBUFFER |
| help |
| Some platforms (e.g. Intel Braswell and Skylake/Kaby Lake) support |
| to run a GOP blob. This option enables graphics initialization with |
| such a blob. |
| |
| config NO_GFX_INIT |
| bool "None" |
| depends on !MAINBOARD_FORCE_NATIVE_VGA_INIT |
| help |
| Select this to not perform any graphics initialization in |
| coreboot. This is useful if the payload (e.g. SeaBIOS) can |
| initialize graphics or if pre-boot graphics are not required. |
| |
| endchoice |
| |
| choice |
| prompt "Early (romstage) graphics initialization" |
| default MAINBOARD_USE_EARLY_LIBGFXINIT if MAINBOARD_HAS_EARLY_LIBGFXINIT |
| default NO_EARLY_GFX_INIT |
| |
| config NO_EARLY_GFX_INIT |
| bool "None" |
| help |
| Select this to not perform any graphics initialization at |
| romstage. |
| |
| config MAINBOARD_USE_EARLY_LIBGFXINIT |
| bool "Use libgfxinit" |
| depends on MAINBOARD_HAS_EARLY_LIBGFXINIT |
| select ROMSTAGE_VGA |
| help |
| Use the SPARK library `libgfxinit` for the romstage native |
| graphics initialization. This requires an Ada |
| toolchain. Graphics at romstage is limited to VGA text mode. |
| |
| endchoice |
| |
| config PRE_GRAPHICS_DELAY_MS |
| int "Graphics initialization delay in ms" |
| default 0 |
| depends on VGA_ROM_RUN |
| help |
| On some systems, coreboot boots so fast that connected monitors |
| (mostly TVs) won't be able to wake up fast enough to talk to the |
| VBIOS. On those systems we need to wait for a bit before executing |
| the VBIOS. |
| |
| config ONBOARD_VGA_IS_PRIMARY |
| bool "Use onboard VGA as primary video device" |
| default n |
| depends on PCI |
| help |
| This option lets you select which VGA device will be used |
| to decode legacy VGA cycles. Not all chipsets implement this |
| however. If not selected, the last adapter found will be used, |
| else the onboard adapter is used. |
| |
| config S3_VGA_ROM_RUN |
| bool "Re-run VGA Option ROMs on S3 resume" |
| default y |
| depends on VGA_ROM_RUN && HAVE_ACPI_RESUME |
| help |
| Execute VGA Option ROMs in coreboot when resuming from S3 suspend. |
| |
| When using a SeaBIOS payload it runs all option ROMs with much |
| more complete BIOS interrupt services available than coreboot, |
| which some option ROMs require in order to function correctly. |
| |
| If unsure, say N when using SeaBIOS as payload, Y otherwise. |
| |
| config ALWAYS_LOAD_OPROM |
| def_bool n |
| depends on VGA_ROM_RUN |
| help |
| Always load option ROMs if any are found. The decision to run |
| the ROM is still determined at runtime, but the distinction |
| between loading and not running comes into play for CHROMEOS. |
| |
| An example where this is required is that VBT (Video BIOS Tables) |
| are needed for the kernel's display driver to know how a piece of |
| hardware is configured to be used. |
| |
| config ALWAYS_RUN_OPROM |
| def_bool n |
| depends on VGA_ROM_RUN && ALWAYS_LOAD_OPROM |
| help |
| Always unconditionally run the option regardless of other |
| policies. |
| |
| config ON_DEVICE_ROM_LOAD |
| bool "Load Option ROMs on PCI devices" |
| default n if PAYLOAD_SEABIOS |
| default y if !PAYLOAD_SEABIOS |
| depends on VGA_ROM_RUN |
| help |
| Load Option ROMs stored on PCI/PCIe/AGP VGA devices in coreboot. |
| |
| If disabled, only Option ROMs stored in CBFS will be executed by |
| coreboot. If you are concerned about security, you might want to |
| disable this option, but it might leave your system in a state of |
| degraded functionality. |
| |
| When using a SeaBIOS payload it runs all option ROMs with much |
| more complete BIOS interrupt services available than coreboot, |
| which some option ROMs require in order to function correctly. |
| |
| If unsure, say N when using SeaBIOS as payload, Y otherwise. |
| |
| choice |
| prompt "Option ROM execution type" |
| default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86 |
| default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86 |
| depends on VGA_ROM_RUN |
| |
| config PCI_OPTION_ROM_RUN_REALMODE |
| prompt "Native mode" |
| bool |
| depends on ARCH_X86 && !ARCH_RAMSTAGE_X86_64 |
| help |
| If you select this option, PCI Option ROMs will be executed |
| natively on the CPU in real mode. No CPU emulation is involved, |
| so this is the fastest, but also the least secure option. |
| (only works on x86/x64 systems) |
| |
| config PCI_OPTION_ROM_RUN_YABEL |
| prompt "Secure mode" |
| bool |
| help |
| If you select this option, the x86emu CPU emulator will be used to |
| execute PCI Option ROMs. |
| |
| This option prevents Option ROMs from doing dirty tricks with the |
| system (such as installing SMM modules or hypervisors), but it is |
| also significantly slower than the native Option ROM initialization |
| method. |
| |
| This is the default choice for non-x86 systems. |
| |
| endchoice |
| |
| config YABEL_PCI_ACCESS_OTHER_DEVICES |
| prompt "Allow Option ROMs to access other devices" |
| bool |
| depends on PCI_OPTION_ROM_RUN_YABEL |
| help |
| Per default, YABEL only allows Option ROMs to access the PCI device |
| that they are associated with. However, this causes trouble for some |
| onboard graphics chips whose Option ROM needs to reconfigure the |
| north bridge. |
| |
| config YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG |
| prompt "Fake success on writing other device's config space" |
| bool |
| depends on YABEL_PCI_ACCESS_OTHER_DEVICES |
| help |
| By default, YABEL aborts when the Option ROM tries to write to other |
| devices' config spaces. With this option enabled, the write doesn't |
| follow through, but the Option ROM is allowed to go on. |
| This can create issues such as hanging Option ROMs (if it depends on |
| that other register changing to the written value), so test for |
| impact before using this option. |
| |
| config YABEL_VIRTMEM_LOCATION |
| prompt "Location of YABEL's virtual memory" |
| hex |
| depends on PCI_OPTION_ROM_RUN_YABEL |
| default 0x1000000 |
| help |
| YABEL requires 1MB memory for its CPU emulation. This memory is |
| normally located at 16MB. |
| |
| config YABEL_DIRECTHW |
| prompt "Direct hardware access" |
| bool |
| depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_X86 |
| help |
| YABEL consists of two parts: It uses x86emu for the CPU emulation and |
| additionally provides a PC system emulation that filters bad device |
| and memory access (such as PCI config space access to other devices |
| than the initialized one). |
| |
| When choosing this option, x86emu will pass through all hardware |
| accesses to memory and I/O devices to the underlying memory and I/O |
| addresses. While this option prevents Option ROMs from doing dirty |
| tricks with the CPU (such as installing SMM modules or hypervisors), |
| they can still access all devices in the system. |
| Enable this option for a good compromise between security and speed. |
| |
| menu "Display" |
| depends on HAVE_VGA_TEXT_FRAMEBUFFER || HAVE_LINEAR_FRAMEBUFFER |
| |
| config FRAMEBUFFER_SET_VESA_MODE |
| prompt "Set framebuffer graphics resolution" |
| bool |
| default y if CHROMEOS |
| depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE |
| select HAVE_VBE_LINEAR_FRAMEBUFFER |
| help |
| Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console) |
| |
| if FRAMEBUFFER_SET_VESA_MODE |
| |
| choice |
| prompt "framebuffer graphics resolution" |
| default FRAMEBUFFER_VESA_MODE_118 |
| help |
| This option sets the resolution used for the coreboot framebuffer (and |
| bootsplash screen). |
| |
| config FRAMEBUFFER_VESA_MODE_100 |
| bool "640x400 256-color" |
| |
| config FRAMEBUFFER_VESA_MODE_101 |
| bool "640x480 256-color" |
| |
| config FRAMEBUFFER_VESA_MODE_102 |
| bool "800x600 16-color" |
| |
| config FRAMEBUFFER_VESA_MODE_103 |
| bool "800x600 256-color" |
| |
| config FRAMEBUFFER_VESA_MODE_104 |
| bool "1024x768 16-color" |
| |
| config FRAMEBUFFER_VESA_MODE_105 |
| bool "1024x768 256-color" |
| |
| config FRAMEBUFFER_VESA_MODE_106 |
| bool "1280x1024 16-color" |
| |
| config FRAMEBUFFER_VESA_MODE_107 |
| bool "1280x1024 256-color" |
| |
| config FRAMEBUFFER_VESA_MODE_108 |
| bool "80x60 text" |
| |
| config FRAMEBUFFER_VESA_MODE_109 |
| bool "132x25 text" |
| |
| config FRAMEBUFFER_VESA_MODE_10A |
| bool "132x43 text" |
| |
| config FRAMEBUFFER_VESA_MODE_10B |
| bool "132x50 text" |
| |
| config FRAMEBUFFER_VESA_MODE_10C |
| bool "132x60 text" |
| |
| config FRAMEBUFFER_VESA_MODE_10D |
| bool "320x200 32k-color (1:5:5:5)" |
| |
| config FRAMEBUFFER_VESA_MODE_10E |
| bool "320x200 64k-color (5:6:5)" |
| |
| config FRAMEBUFFER_VESA_MODE_10F |
| bool "320x200 16.8M-color (8:8:8)" |
| |
| config FRAMEBUFFER_VESA_MODE_110 |
| bool "640x480 32k-color (1:5:5:5)" |
| |
| config FRAMEBUFFER_VESA_MODE_111 |
| bool "640x480 64k-color (5:6:5)" |
| |
| config FRAMEBUFFER_VESA_MODE_112 |
| bool "640x480 16.8M-color (8:8:8)" |
| |
| config FRAMEBUFFER_VESA_MODE_113 |
| bool "800x600 32k-color (1:5:5:5)" |
| |
| config FRAMEBUFFER_VESA_MODE_114 |
| bool "800x600 64k-color (5:6:5)" |
| |
| config FRAMEBUFFER_VESA_MODE_115 |
| bool "800x600 16.8M-color (8:8:8)" |
| |
| config FRAMEBUFFER_VESA_MODE_116 |
| bool "1024x768 32k-color (1:5:5:5)" |
| |
| config FRAMEBUFFER_VESA_MODE_117 |
| bool "1024x768 64k-color (5:6:5)" |
| |
| config FRAMEBUFFER_VESA_MODE_118 |
| bool "1024x768 16.8M-color (8:8:8)" |
| |
| config FRAMEBUFFER_VESA_MODE_119 |
| bool "1280x1024 32k-color (1:5:5:5)" |
| |
| config FRAMEBUFFER_VESA_MODE_11A |
| bool "1280x1024 64k-color (5:6:5)" |
| |
| config FRAMEBUFFER_VESA_MODE_11B |
| bool "1280x1024 16.8M-color (8:8:8)" |
| |
| config FRAMEBUFFER_VESA_MODE_USER |
| bool "Manually select VESA mode" |
| |
| endchoice |
| |
| # Map the config names to an integer (KB). |
| config FRAMEBUFFER_VESA_MODE |
| prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER |
| hex |
| default 0x100 if FRAMEBUFFER_VESA_MODE_100 |
| default 0x101 if FRAMEBUFFER_VESA_MODE_101 |
| default 0x102 if FRAMEBUFFER_VESA_MODE_102 |
| default 0x103 if FRAMEBUFFER_VESA_MODE_103 |
| default 0x104 if FRAMEBUFFER_VESA_MODE_104 |
| default 0x105 if FRAMEBUFFER_VESA_MODE_105 |
| default 0x106 if FRAMEBUFFER_VESA_MODE_106 |
| default 0x107 if FRAMEBUFFER_VESA_MODE_107 |
| default 0x108 if FRAMEBUFFER_VESA_MODE_108 |
| default 0x109 if FRAMEBUFFER_VESA_MODE_109 |
| default 0x10A if FRAMEBUFFER_VESA_MODE_10A |
| default 0x10B if FRAMEBUFFER_VESA_MODE_10B |
| default 0x10C if FRAMEBUFFER_VESA_MODE_10C |
| default 0x10D if FRAMEBUFFER_VESA_MODE_10D |
| default 0x10E if FRAMEBUFFER_VESA_MODE_10E |
| default 0x10F if FRAMEBUFFER_VESA_MODE_10F |
| default 0x110 if FRAMEBUFFER_VESA_MODE_110 |
| default 0x111 if FRAMEBUFFER_VESA_MODE_111 |
| default 0x112 if FRAMEBUFFER_VESA_MODE_112 |
| default 0x113 if FRAMEBUFFER_VESA_MODE_113 |
| default 0x114 if FRAMEBUFFER_VESA_MODE_114 |
| default 0x115 if FRAMEBUFFER_VESA_MODE_115 |
| default 0x116 if FRAMEBUFFER_VESA_MODE_116 |
| default 0x117 if FRAMEBUFFER_VESA_MODE_117 |
| default 0x118 if FRAMEBUFFER_VESA_MODE_118 |
| default 0x119 if FRAMEBUFFER_VESA_MODE_119 |
| default 0x11A if FRAMEBUFFER_VESA_MODE_11A |
| default 0x11B if FRAMEBUFFER_VESA_MODE_11B |
| default 0x118 if FRAMEBUFFER_VESA_MODE_USER |
| endif # FRAMEBUFFER_SET_VESA_MODE |
| |
| config WANT_LINEAR_FRAMEBUFFER |
| bool |
| default y if CHROMEOS |
| default y if PAYLOAD_EDK2 |
| default y if COREDOOM_SECONDARY_PAYLOAD |
| |
| choice |
| prompt "Framebuffer mode" |
| default VBE_LINEAR_FRAMEBUFFER if HAVE_VBE_LINEAR_FRAMEBUFFER && WANT_LINEAR_FRAMEBUFFER |
| default GENERIC_LINEAR_FRAMEBUFFER if HAVE_LINEAR_FRAMEBUFFER && WANT_LINEAR_FRAMEBUFFER |
| default VGA_TEXT_FRAMEBUFFER |
| |
| config VGA_TEXT_FRAMEBUFFER |
| bool "Legacy VGA text mode" |
| depends on HAVE_VGA_TEXT_FRAMEBUFFER |
| help |
| If this option is enabled, coreboot will initialize graphics in |
| legacy VGA text mode or, if a VGA BIOS is used and a VESA mode set, |
| switch to text mode before handing control to a payload. |
| |
| config VBE_LINEAR_FRAMEBUFFER |
| bool "VESA framebuffer" |
| depends on HAVE_VBE_LINEAR_FRAMEBUFFER |
| help |
| This option keeps the framebuffer mode set after coreboot finishes |
| execution. If this option is enabled, coreboot will pass a |
| framebuffer entry in its coreboot table and the payload will need a |
| compatible driver. |
| |
| config GENERIC_LINEAR_FRAMEBUFFER |
| bool "Linear \"high-resolution\" framebuffer" |
| depends on HAVE_LINEAR_FRAMEBUFFER |
| help |
| This option enables a high-resolution, linear framebuffer. If this |
| option is enabled, coreboot will pass a framebuffer entry in its |
| coreboot table and the payload will need a compatible driver. |
| |
| endchoice |
| |
| # Workaround to have LINEAR_FRAMEBUFFER set in both cases |
| # VBE_LINEAR_FRAMEBUFFER and GENERIC_LINEAR_FRAMEBUFFER. |
| # `kconfig_lint` doesn't let us use the same name with |
| # different texts in the choice above. |
| config LINEAR_FRAMEBUFFER |
| def_bool y |
| depends on VBE_LINEAR_FRAMEBUFFER || GENERIC_LINEAR_FRAMEBUFFER |
| |
| config BOOTSPLASH |
| prompt "Show graphical bootsplash" |
| bool |
| depends on LINEAR_FRAMEBUFFER |
| help |
| This option shows a graphical bootsplash screen. The graphics are |
| loaded from the CBFS file bootsplash.jpg. |
| |
| You can either specify the location and file name of the |
| image in the 'General' section or add it manually to CBFS, using, |
| for example, cbfstool. |
| |
| config LINEAR_FRAMEBUFFER_MAX_WIDTH |
| int "Maximum width in pixels" |
| depends on LINEAR_FRAMEBUFFER && MAINBOARD_USE_LIBGFXINIT |
| default 2560 if SYSTEM_TYPE_LAPTOP |
| default 3840 |
| help |
| Set the maximum width of the framebuffer. This may help with |
| default fonts too tiny for high-resolution displays. |
| |
| config LINEAR_FRAMEBUFFER_MAX_HEIGHT |
| int "Maximum height in pixels" |
| depends on LINEAR_FRAMEBUFFER && MAINBOARD_USE_LIBGFXINIT |
| default 1600 if SYSTEM_TYPE_LAPTOP |
| default 2160 |
| help |
| Set the maximum height of the framebuffer. This may help with |
| default fonts too tiny for high-resolution displays. |
| |
| endmenu # "Display" |
| |
| config PCI |
| bool |
| default n |
| |
| config PCI_IOBASE |
| hex |
| help |
| The memory address of a memory-mapped translator that lets the |
| CPU communicate with peripheral devices over PCI I/O space. |
| |
| if PCI |
| |
| config DOMAIN_RESOURCE_32BIT_LIMIT |
| hex |
| default 0xfe000000 |
| help |
| When the default pci_domain_read_resources() is used, |
| keep 32-bit memory resources below this limit. This is |
| used as a workaround for missing/wrong reservations of |
| chipset resources that usually reside above this limit. |
| |
| config NO_ECAM_MMCONF_SUPPORT |
| bool |
| default n |
| help |
| Disable the use of the Enhanced Configuration |
| Access mechanism (ECAM) method for accessing PCI config |
| address space. |
| |
| config ECAM_MMCONF_SUPPORT |
| bool |
| default !NO_ECAM_MMCONF_SUPPORT |
| help |
| Enable the use of the Enhanced Configuration |
| Access mechanism (ECAM) method for accessing PCI config |
| address space. |
| |
| config PCIX_PLUGIN_SUPPORT |
| bool |
| default y |
| |
| config CARDBUS_PLUGIN_SUPPORT |
| bool |
| default y |
| |
| config AZALIA_HDA_CODEC_SUPPORT |
| bool |
| default n |
| help |
| Select this option to include the code to initialize Azalia HD audio |
| codec chips. This will also add the hda_verb.c file from the |
| mainboard directory to the build which contain the board-specific HD |
| audio codec configuration. |
| |
| config AZALIA_LOCK_DOWN_R_WO_GCAP |
| def_bool n |
| depends on AZALIA_HDA_CODEC_SUPPORT |
| help |
| The GCAP register is implemented as R/WO (Read / Write Once) on some |
| HD Audio controllers, such as Intel 6-series PCHs. Select this option |
| to lock down the GCAP register after deasserting the controller reset |
| bit. Locking is done by reading GCAP and writing back the read value. |
| |
| config PCIEXP_PLUGIN_SUPPORT |
| bool |
| default y |
| |
| config ECAM_MMCONF_BASE_ADDRESS |
| hex |
| depends on ECAM_MMCONF_SUPPORT |
| |
| config ECAM_MMCONF_BUS_NUMBER |
| int |
| depends on ECAM_MMCONF_SUPPORT |
| help |
| Total number of PCI buses in the system across all segment groups. |
| The number needs to be a power of 2. For values <= 256, |
| PCI_BUSES_PER_SEGMENT_GROUP is CONFIG_ECAM_MMCONF_BUS_NUMBER and |
| PCI_SEGMENT_GROUP_COUNT is 1. For values > 256, |
| PCI_BUSES_PER_SEGMENT_GROUP is 256 and PCI_SEGMENT_GROUP_COUNT is |
| CONFIG_ECAM_MMCONF_BUS_NUMBER / 256. |
| |
| config ECAM_MMCONF_LENGTH |
| hex |
| depends on ECAM_MMCONF_SUPPORT |
| default 0x02000000 if ECAM_MMCONF_BUS_NUMBER = 32 |
| default 0x04000000 if ECAM_MMCONF_BUS_NUMBER = 64 |
| default 0x08000000 if ECAM_MMCONF_BUS_NUMBER = 128 |
| default 0x10000000 if ECAM_MMCONF_BUS_NUMBER = 256 |
| default 0x20000000 if ECAM_MMCONF_BUS_NUMBER = 512 |
| default 0x80000000 if ECAM_MMCONF_BUS_NUMBER = 1024 |
| default 0x0 |
| |
| config PCI_ALLOW_BUS_MASTER |
| bool "Allow coreboot to set optional PCI bus master bits" |
| default y |
| help |
| For security reasons, bus mastering should be enabled as late as |
| possible. In coreboot, it's usually not necessary and payloads |
| should only enable it for devices they use. Since not all payloads |
| enable bus mastering properly yet, this option gives some sort of |
| "backwards compatibility" and is enabled by default to keep the |
| traditional behaviour for now. This is currently necessary, for |
| instance, for libpayload based payloads as the drivers don't enable |
| bus mastering for PCI bridges. |
| |
| if PCI_ALLOW_BUS_MASTER |
| |
| config PCI_SET_BUS_MASTER_PCI_BRIDGES |
| bool "PCI bridges" |
| default y |
| help |
| Let coreboot configure bus mastering for PCI bridges. Enabling bus |
| mastering for a PCI bridge also allows it to forward requests from |
| downstream devices. Currently, payloads ignore this and only enable |
| bus mastering for the downstream device. Hence, this option is needed |
| for compatibility until payloads are fixed. |
| |
| config PCI_ALLOW_BUS_MASTER_ANY_DEVICE |
| bool "Any devices" |
| default y |
| select PCI_SET_BUS_MASTER_PCI_BRIDGES |
| help |
| Allow coreboot to enable PCI bus mastering for any device. The actual |
| selection of devices depends on the various PCI drivers in coreboot. |
| |
| endif # PCI_ALLOW_BUS_MASTER |
| |
| endif # PCI |
| |
| if PCIEXP_PLUGIN_SUPPORT |
| |
| config PCIEXP_COMMON_CLOCK |
| prompt "Enable PCIe Common Clock" |
| bool |
| default n |
| help |
| Detect and enable Common Clock on PCIe links. |
| |
| config PCIEXP_ASPM |
| prompt "Enable PCIe ASPM" |
| bool |
| default n |
| help |
| Detect and enable ASPM (Active State Power Management) on PCIe links. |
| |
| config PCIEXP_CLK_PM |
| prompt "Enable PCIe Clock Power Management" |
| bool |
| default n |
| help |
| Detect and enable Clock Power Management on PCIe. |
| |
| config PCIEXP_L1_SUB_STATE |
| prompt "Enable PCIe ASPM L1 SubState" |
| bool |
| depends on (ECAM_MMCONF_SUPPORT || PCI_IO_CFG_EXT) |
| default n |
| help |
| Detect and enable ASPM on PCIe links. |
| |
| config PCIEXP_SUPPORT_RESIZABLE_BARS |
| prompt "Support PCIe Resizable BARs" |
| bool |
| depends on (ECAM_MMCONF_SUPPORT || PCI_IO_CFG_EXT) |
| default n |
| help |
| When enabled, this will check PCIe devices for Resizable BAR support, |
| and if found, will use this to discover the preferred BAR sizes of |
| the device in preference over the traditional moving bits method. The |
| amount of address space given out to devices in this manner (since |
| it can range up to 8 EB) can be limited with the |
| PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS Kconfig setting below. |
| |
| if PCIEXP_SUPPORT_RESIZABLE_BARS |
| |
| config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS |
| int "Bits of address space to give to Resizable BARs" |
| range 20 63 # 1 MiB - 8 EiB |
| default 29 # 512 MiB |
| help |
| This is the maximum number of bits of address space to allocate for |
| PCIe devices with resizable BARs. For instance, if a device requests |
| 30 bits of address space (1 GiB), but this field is set to 29, then |
| the device will only be allocated 29 bits worth of address space (512 |
| MiB). Valid values range from 20 (1 MiB) to 63 (8 EiB); these come |
| from the Resizable BAR portion of the PCIe spec (7.8.6). |
| |
| endif # PCIEXP_SUPPORT_RESIZABLE_BARS |
| |
| config PCIEXP_LANE_ERR_STAT_CLEAR |
| prompt "Enable Clear PCIe Lane Error Status" |
| bool |
| default n |
| help |
| Clear the PCIe Lane Error Status at the end of link training. |
| |
| config PCIEXP_HOTPLUG |
| prompt "Enable PCIe Hotplug Support" |
| bool |
| default n |
| help |
| Allocate resources for PCIe hotplug bridges |
| |
| if PCIEXP_HOTPLUG |
| |
| config PCIEXP_HOTPLUG_BUSES |
| int "PCI Express Hotplug Buses" |
| default 8 |
| help |
| This is the number of buses allocated for hotplug PCI express |
| bridges, for use by hotplugged child devices. The default is 8 |
| buses. |
| |
| config PCIEXP_HOTPLUG_MEM |
| hex "PCI Express Hotplug Memory" |
| default 0x800000 |
| help |
| This is the amount of memory space, in bytes, to allocate to |
| hotplug PCI express bridges, for use by hotplugged child devices. |
| This size should be page-aligned. The default is 8 MiB. |
| |
| config PCIEXP_HOTPLUG_PREFETCH_MEM |
| hex "PCI Express Hotplug Prefetch Memory" |
| default 0x10000000 |
| help |
| This is the amount of pre-fetchable memory space, in bytes, to |
| allocate to hot-plug PCI express bridges, for use by hotplugged |
| child devices. This size should be page-aligned. The default is |
| 256 MiB. |
| |
| config PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G |
| bool |
| default y if !PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G |
| default n |
| help |
| This enables prefetch memory allocation above 4G boundary for the |
| hotplug resources. |
| |
| config PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G |
| bool "PCI Express Hotplug Prefetch Memory Allocation below 4G boundary" |
| default n |
| help |
| This enables prefetch memory allocation below 4G boundary for the |
| hotplug resources. |
| |
| config PCIEXP_HOTPLUG_IO |
| hex "PCI Express Hotplug I/O Space" |
| default 0x800 |
| help |
| This is the amount of I/O space to allocate to hot-plug PCI |
| express bridges, for use by hotplugged child devices. The default |
| is 2 KiB. |
| |
| endif # PCIEXP_HOTPLUG |
| |
| endif # PCIEXP_PLUGIN_SUPPORT |
| |
| config EARLY_PCI_BRIDGE |
| bool "Early PCI bridge" |
| depends on PCI |
| default n |
| help |
| While coreboot is executing code from ROM, the coreboot resource |
| allocator has not been running yet. Hence PCI devices living behind |
| a bridge are not yet visible to the system. |
| |
| This option enables static configuration for a single pre-defined |
| PCI bridge function on bus 0. |
| |
| if EARLY_PCI_BRIDGE |
| |
| config EARLY_PCI_BRIDGE_DEVICE |
| hex "bridge device" |
| default 0x0 |
| |
| config EARLY_PCI_BRIDGE_FUNCTION |
| hex "bridge function" |
| default 0x0 |
| |
| config EARLY_PCI_MMIO_BASE |
| hex "MMIO window base" |
| default 0x0 |
| |
| endif # EARLY_PCI_BRIDGE |
| |
| config SUBSYSTEM_VENDOR_ID |
| hex "Override PCI Subsystem Vendor ID" |
| depends on PCI |
| default 0x0000 |
| help |
| This config option will override the devicetree settings for |
| PCI Subsystem Vendor ID. |
| |
| Note: This option is not meant for a board's Kconfig; use the |
| devicetree setting `subsystemid` instead. |
| |
| config SUBSYSTEM_DEVICE_ID |
| hex "Override PCI Subsystem Device ID" |
| depends on PCI |
| default 0x0000 |
| help |
| This config option will override the devicetree settings for |
| PCI Subsystem Device ID. |
| |
| Note: This option is not meant for a board's Kconfig; use the |
| devicetree setting `subsystemid` instead. |
| |
| config VGA_BIOS |
| bool "Add a VGA BIOS image" |
| depends on ARCH_X86 |
| select VGA_ROM_RUN_DEFAULT |
| help |
| Select this option if you have a VGA BIOS image that you would |
| like to add to your ROM. |
| |
| You will be able to specify the location and file name of the |
| image later. |
| |
| config VGA_BIOS_FILE |
| string "VGA BIOS path and filename" |
| depends on VGA_BIOS |
| default "vgabios.bin" |
| help |
| The path and filename of the file to use as VGA BIOS. |
| |
| config VGA_BIOS_ID |
| string "VGA device PCI IDs" |
| depends on VGA_BIOS |
| default "1106,3230" |
| help |
| The comma-separated PCI vendor and device ID that would associate |
| your vBIOS to your video card. |
| |
| Example: 1106,3230 |
| |
| In the above example 1106 is the PCI vendor ID (in hex, but without |
| the "0x" prefix) and 3230 specifies the PCI device ID of the |
| video card (also in hex, without "0x" prefix). |
| |
| This ID needs to match the PCI VID and DID in the VGA BIOS file's |
| header and also needs to match the value returned by map_oprom_vendev |
| if the remapping feature is used. |
| |
| Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. |
| |
| config VGA_BIOS_SECOND |
| bool "Add a 2nd video BIOS image" |
| depends on ARCH_X86 && VGA_BIOS |
| help |
| Select this option if you have a 2nd video BIOS image that you would |
| like to add to your ROM. |
| |
| config VGA_BIOS_SECOND_FILE |
| string "2nd video BIOS path and filename" |
| depends on VGA_BIOS_SECOND |
| default "vbios2.bin" |
| help |
| The path and filename of the file to use as video BIOS. |
| |
| config VGA_BIOS_SECOND_ID |
| string "Graphics device PCI IDs" |
| depends on VGA_BIOS_SECOND |
| help |
| The comma-separated PCI vendor and device ID that would associate |
| your vBIOS to your video card. |
| |
| Example: 1106,3230 |
| |
| In the above example 1106 is the PCI vendor ID (in hex, but without |
| the "0x" prefix) and 3230 specifies the PCI device ID of the |
| video card (also in hex, without "0x" prefix). |
| |
| Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. |
| |
| config VGA_BIOS_DGPU |
| bool "Add a discrete VGA BIOS image" |
| depends on VGA_BIOS |
| help |
| Select this option if you have a VGA BIOS image for discrete GPU |
| that you would like to add to your ROM. |
| |
| You will be able to specify the location and file name of the |
| image later. |
| |
| config VGA_BIOS_DGPU_FILE |
| string "Discrete VGA BIOS path and filename" |
| depends on VGA_BIOS_DGPU |
| default "vgabios_dgpu.bin" |
| help |
| The path and filename of the file to use as VGA BIOS for discrete GPU. |
| |
| config VGA_BIOS_DGPU_ID |
| string "Discrete VGA device PCI IDs" |
| depends on VGA_BIOS_DGPU |
| default "1002,6663" |
| help |
| The comma-separated PCI vendor and device ID that would associate |
| your VGA BIOS to your discrete video card. |
| |
| Examples: |
| 1002,6663 for HD 8570M |
| 1002,6665 for R5 M230 |
| |
| In the above examples 1002 is the PCI vendor ID (in hex, but without |
| the "0x" prefix) and 6663 / 6665 specifies the PCI device ID of the |
| discrete video card (also in hex, without "0x" prefix). |
| |
| Under GNU/Linux you can run `lspci -nn` to list the IDs of your PCI devices. |
| |
| config INTEL_GMA_HAVE_VBT |
| bool |
| help |
| Select this in the mainboard Kconfig to indicate the board has |
| a data.vbt file. |
| |
| config INTEL_GMA_ADD_VBT |
| depends on SOC_INTEL_COMMON || CPU_INTEL_COMMON |
| bool "Add a Video BIOS Table (VBT) binary to CBFS" |
| default y if INTEL_GMA_HAVE_VBT |
| help |
| Add a VBT data file to CBFS. The VBT describes the integrated |
| GPU and connections, and is needed by the GOP driver integrated into |
| FSP and the OS driver in order to initialize the display. |
| |
| config INTEL_GMA_VBT_FILE |
| string "VBT binary path and filename" |
| depends on INTEL_GMA_ADD_VBT |
| default "src/mainboard/\$(MAINBOARDDIR)/variants/\$(VARIANT_DIR)/data.vbt" \ |
| if INTEL_GMA_HAVE_VBT && VARIANT_DIR != "" |
| default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" if INTEL_GMA_HAVE_VBT |
| default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/vbt.bin" |
| help |
| The path and filename of the VBT binary. |
| |
| config SOFTWARE_I2C |
| bool "Enable I2C controller emulation in software" |
| default n |
| help |
| This config option will enable code to override the i2c_transfer |
| routine with a (simple) software emulation of the protocol. This may |
| be useful for debugging or on platforms where a driver for the real |
| I2C controller is not (yet) available. The platform code needs to |
| provide bindings to manually toggle I2C lines. |
| |
| config I2C_TRANSFER_TIMEOUT_US |
| int "I2C transfer timeout in microseconds" |
| default 500000 |
| help |
| Timeout for a read/write transfers on the I2C bus, that is, the |
| maximum time a device could stretch clock bits before the transfer |
| is aborted and an error returned. |
| |
| config RESOURCE_ALLOCATION_TOP_DOWN |
| bool "Allocate resources from top down" |
| default n if PAYLOAD_EDK2 |
| default y |
| help |
| Top-down allocation is required to place resources above 4G by |
| default (i.e. even when there is still space below). On some |
| platforms, it might make a difference because of conflicts with |
| undeclared resources. EDK2 is currently reported to also have |
| problems on some platforms, at least with Intel's IGD. |
| |
| config ALWAYS_ALLOW_ABOVE_4G_ALLOCATION |
| bool |
| default n if ARCH_X86 |
| default y |
| help |
| Don't limit mem resources to 4G, but to their actual limit. |
| |
| config XHCI_UTILS |
| def_bool n |
| help |
| Provides xHCI utility functions. |
| |
| config D3COLD_SUPPORT |
| bool |
| default y |
| help |
| Enable this option if all devices on your system support the |
| D3Cold power management state. The D3Cold state is a low-power |
| state where the device has been powered down and is no longer |
| able to maintain its context. This state can help reduce |
| overall system power consumption, which can be beneficial for |
| energy savings and thermal management. |
| |
| Please note that enabling D3Cold support may break system |
| suspend-to-RAM (S3) functionality. |
| |
| source "src/device/dram/Kconfig" |
| |
| endmenu |