Documentation: Add x86 documentation for required files
Document the required files to perform a minimal coreboot/FSP build for
x86.
TEST=None
Change-Id: I65b2947114634fce982ce82fb7c577fd5f47ed10
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13438
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/Documentation/Intel/Board/board.html b/Documentation/Intel/Board/board.html
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+<!DOCTYPE html>
+<html>
+ <head>
+ <title>Board</title>
+ </head>
+ <body>
+
+<h1>x86 Board Development</h1>
+<p>
+ Board development requires System-on-a-Chip (SoC) support.
+ The combined steps are listed
+ <a target="_blank" href="../x86Development.html">here</a>.
+ The development steps for the board are listed below:
+</p>
+<ol>
+ <li><a href="#RequiredFiles">Required Files</a></li>
+</ol>
+
+
+<hr>
+<h1><a name="RequiredFiles">Required Files</a></h1>
+<p>
+ Create the board directory as src/mainboard/<Vendor>/<Board>.
+</p>
+
+<p>
+ The following files are required to build a new board:
+</p>
+<ol>
+ <li>Kconfig.name - Defines the Kconfig value for the board</li>
+ <li>Kconfig
+ <ol type="A">
+ <li>Selects the SoC for the board and specifies the SPI flash size
+ <ol type="I">
+ <li>BOARD_ROMSIZE_KB_<Size></li>
+ <li>SOC_<Vendor>_<Chip Family></li>
+ </ol>
+ </li>
+ <li>Declare the Kconfig values for:
+ <ol type="I">
+ <li>MAINBOARD_DIR</li>
+ <li>MAINBOARD_PART_NUMBER</li>
+ <li>MAINBOARD_VENDOR</li>
+ </ol>
+ </li>
+ </ol>
+ </li>
+ <li>devicetree.cb - Enable root bridge and serial port
+ <ol type="A">
+ <li>The first line must be "chip soc/Intel/<soc family>";
+ this path is used by the generated static.c to include the chip.h
+ header file
+ </li>
+ </ol>
+ </li>
+ <li>romstage.c
+ <ol type="A">
+ <li>Add routine mainboard_romstage_entry which calls romstage_common</li>
+ </ol>
+ </li>
+ <li>Configure coreboot build:
+ <ol type="A">
+ <li>Set LOCALVERSION</li>
+ <li>FLASHMAP_OFFSET = 0x00700000</li>
+ <li>Select vendor for the board</li>
+ <li>Select the board</li>
+ <li>CBFS_SIZE = 0x00100000</li>
+ <li>Set the CPU_MICROCODE_CBFS_LEN</li>
+ <li>Set the CPU_MICROCODE_CBFS_LOC</li>
+ <li>Set the FSP_IMAGE_ID_STRING</li>
+ <li>Set the FSP_LOC</li>
+ <li>Disable GOP_SUPPORT</li>
+ <li>No payload</li>
+ <li>Choose the default value for all other options</li>
+ </ol>
+ </li>
+</ol>
+
+
+<hr>
+<p>Modified: 31 January 2016</p>
+ </body>
+</html>
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