| chip soc/intel/skylake |
| |
| # IGD Displays |
| register "gfx" = "GMA_STATIC_DISPLAYS(0)" |
| |
| register "panel_cfg" = "{ |
| .up_delay_ms = 100, |
| .down_delay_ms = 500, |
| .cycle_delay_ms = 500, |
| .backlight_on_delay_ms = 1, |
| .backlight_off_delay_ms = 200, |
| .backlight_pwm_hz = 1000, |
| }" |
| |
| # Deep Sx states |
| register "deep_s3_enable_ac" = "0" |
| register "deep_s3_enable_dc" = "1" |
| register "deep_s5_enable_ac" = "1" |
| register "deep_s5_enable_dc" = "1" |
| register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" |
| |
| # GPE configuration |
| # Note that GPE events called out in ASL code rely on this |
| # route. i.e. If this route changes then the affected GPE |
| # offset bits also need to be changed. |
| register "gpe0_dw0" = "GPP_B" |
| register "gpe0_dw1" = "GPP_D" |
| register "gpe0_dw2" = "GPP_E" |
| |
| # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f |
| register "gen1_dec" = "0x00fc0801" |
| register "gen2_dec" = "0x000c0201" |
| # EC memory map range is 0x900-0x9ff |
| register "gen3_dec" = "0x00fc0901" |
| |
| # Enable DPTF |
| register "dptf_enable" = "1" |
| |
| # Enable S0ix |
| register "s0ix_enable" = true |
| |
| # FSP Configuration |
| register "SataSalpSupport" = "0" |
| register "DspEnable" = "1" |
| register "IoBufferOwnership" = "3" |
| register "SsicPortEnable" = "0" |
| register "ScsEmmcHs400Enabled" = "1" |
| register "SkipExtGfxScan" = "1" |
| register "SaGv" = "SaGv_Enabled" |
| register "PmConfigSlpS3MinAssert" = "2" # 50ms |
| register "PmConfigSlpS4MinAssert" = "1" # 1s |
| register "PmConfigSlpSusMinAssert" = "1" # 500ms |
| register "PmConfigSlpAMinAssert" = "3" # 2s |
| |
| # Intersil VR c-state issue workaround |
| # send VR mailbox command for IA/GT/SA rails |
| register "IslVrCmd" = "2" |
| |
| # VR Settings Configuration for 4 Domains |
| #+----------------+-------+-------+-------+-------+ |
| #| Domain/Setting | SA | IA | GTUS | GTS | |
| #+----------------+-------+-------+-------+-------+ |
| #| Psi1Threshold | 20A | 20A | 20A | 20A | |
| #| Psi2Threshold | 2A | 2A | 2A | 2A | |
| #| Psi3Threshold | 1A | 1A | 1A | 1A | |
| #| Psi3Enable | 1 | 1 | 1 | 1 | |
| #| Psi4Enable | 1 | 1 | 1 | 1 | |
| #| ImonSlope | 0 | 0 | 0 | 0 | |
| #| ImonOffset | 0 | 0 | 0 | 0 | |
| #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | |
| #| AcLoadline | 11 | 2.4 | 3.1 | 3.1 | |
| #| DcLoadline | 10 | 2.46 | 3.1 | 3.1 | |
| #+----------------+-------+-------+-------+-------+ |
| register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ |
| .vr_config_enable = 1, |
| .psi1threshold = VR_CFG_AMP(20), |
| .psi2threshold = VR_CFG_AMP(2), |
| .psi3threshold = VR_CFG_AMP(1), |
| .psi3enable = 1, |
| .psi4enable = 1, |
| .imon_slope = 0x0, |
| .imon_offset = 0x0, |
| .voltage_limit = 1520, |
| .ac_loadline = 1100, |
| .dc_loadline = 1000, |
| }" |
| |
| register "domain_vr_config[VR_IA_CORE]" = "{ |
| .vr_config_enable = 1, |
| .psi1threshold = VR_CFG_AMP(20), |
| .psi2threshold = VR_CFG_AMP(2), |
| .psi3threshold = VR_CFG_AMP(1), |
| .psi3enable = 1, |
| .psi4enable = 1, |
| .imon_slope = 0x0, |
| .imon_offset = 0x0, |
| .voltage_limit = 1520, |
| .ac_loadline = 240, |
| .dc_loadline = 246, |
| }" |
| |
| register "domain_vr_config[VR_GT_UNSLICED]" = "{ |
| .vr_config_enable = 1, |
| .psi1threshold = VR_CFG_AMP(20), |
| .psi2threshold = VR_CFG_AMP(2), |
| .psi3threshold = VR_CFG_AMP(1), |
| .psi3enable = 1, |
| .psi4enable = 1, |
| .imon_slope = 0x0, |
| .imon_offset = 0x0, |
| .voltage_limit = 1520, |
| .ac_loadline = 310, |
| .dc_loadline = 310, |
| }" |
| |
| register "domain_vr_config[VR_GT_SLICED]" = "{ |
| .vr_config_enable = 1, |
| .psi1threshold = VR_CFG_AMP(20), |
| .psi2threshold = VR_CFG_AMP(2), |
| .psi3threshold = VR_CFG_AMP(1), |
| .psi3enable = 1, |
| .psi4enable = 1, |
| .imon_slope = 0x0, |
| .imon_offset = 0x0, |
| .voltage_limit = 1520, |
| .ac_loadline = 310, |
| .dc_loadline = 310, |
| }" |
| |
| # Root port 4 (x1) |
| # PcieRpEnable: Enable root port |
| # PcieRpClkReqSupport: Enable CLKREQ# |
| # PcieRpClkReqNumber: Uses SRCCLKREQ1# |
| # PcieRpClkSrcNumber: Uses 1 |
| # PcieRpAdvancedErrorReporting: Enable Advanced Error Reporting |
| # PcieRpLtrEnable: Enable Latency Tolerance Reporting Mechanism |
| register "PcieRpEnable[3]" = "1" |
| register "PcieRpClkReqSupport[3]" = "1" |
| register "PcieRpClkReqNumber[3]" = "1" |
| register "PcieRpClkSrcNumber[3]" = "1" |
| register "PcieRpAdvancedErrorReporting[3]" = "1" |
| register "PcieRpLtrEnable[3]" = "1" |
| |
| # Root port 5 (x4) |
| # PcieRpEnable: Enable root port |
| # PcieRpClkReqSupport: Enable CLKREQ# |
| # PcieRpClkReqNumber: Uses SRCCLKREQ3# |
| # PcieRpClkSrcNumber: Uses 3 |
| # PcieRpAdvancedErrorReporting: Enable Advanced Error Reporting |
| # PcieRpLtrEnable: Enable Latency Tolerance Reporting Mechanism |
| register "PcieRpEnable[4]" = "1" |
| register "PcieRpClkReqSupport[4]" = "1" |
| register "PcieRpClkReqNumber[4]" = "3" |
| register "PcieRpClkSrcNumber[4]" = "3" |
| register "PcieRpAdvancedErrorReporting[4]" = "1" |
| register "PcieRpLtrEnable[4]" = "1" |
| |
| # Root port 9 (x2) |
| # PcieRpEnable: Enable root port |
| # PcieRpClkReqSupport: Enable CLKREQ# |
| # PcieRpClkReqNumber: Uses SRCCLKREQ2# |
| # PcieRpClkSrcNumber: Uses 2 |
| # PcieRpAdvancedErrorReporting: Enable Advanced Error Reporting |
| # PcieRpLtrEnable: Enable Latency Tolerance Reporting Mechanism |
| register "PcieRpEnable[8]" = "1" |
| register "PcieRpClkReqSupport[8]" = "1" |
| register "PcieRpClkReqNumber[8]" = "2" |
| register "PcieRpClkSrcNumber[8]" = "2" |
| register "PcieRpAdvancedErrorReporting[8]" = "1" |
| register "PcieRpLtrEnable[8]" = "1" |
| |
| register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C Port 0 |
| register "usb2_ports[1]" = "USB2_PORT_LONG(OC1)" # Type-C Port 1 |
| register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Port |
| register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Card reader |
| register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # WiFi |
| register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Rear camera |
| register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Front camera |
| |
| register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C Port 0 |
| register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-C Port 1 |
| register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port |
| register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Card reader |
| |
| # Touchscreen |
| register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" |
| |
| # Trackpad |
| register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" |
| |
| # Pen |
| register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" |
| |
| # Audio |
| register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" |
| |
| # Intel Common SoC Config |
| #+-------------------+---------------------------+ |
| #| Field | Value | |
| #+-------------------+---------------------------+ |
| #| GSPI0 | cr50 TPM. Early init is | |
| #| | required to set up a BAR | |
| #| | for TPM communication | |
| #| | before memory is up | |
| #| I2C0 | Touchscreen | |
| #| I2C1 | Trackpad | |
| #| I2C2 | Pen | |
| #| I2C3 | Audio | |
| #| pch_thermal_trip | PCH Trip Temperature | |
| #+-------------------+---------------------------+ |
| register "common_soc_config" = "{ |
| .gspi[0] = { |
| .speed_mhz = 1, |
| .early_init = 1, |
| }, |
| .i2c[0] = { |
| .speed = I2C_SPEED_FAST, |
| .speed_config[0] = { |
| .speed = I2C_SPEED_FAST, |
| .scl_lcnt = 185, |
| .scl_hcnt = 90, |
| .sda_hold = 36, |
| }, |
| }, |
| .i2c[1] = { |
| .speed = I2C_SPEED_FAST, |
| .speed_config[0] = { |
| .speed = I2C_SPEED_FAST, |
| .scl_lcnt = 185, |
| .scl_hcnt = 90, |
| .sda_hold = 36, |
| }, |
| .early_init = 1, |
| }, |
| .i2c[2] = { |
| .speed = I2C_SPEED_FAST, |
| .speed_config[0] = { |
| .speed = I2C_SPEED_FAST, |
| .scl_lcnt = 185, |
| .scl_hcnt = 100, |
| .sda_hold = 36, |
| }, |
| }, |
| .i2c[3] = { |
| .speed = I2C_SPEED_FAST, |
| .speed_config[0] = { |
| .speed = I2C_SPEED_FAST, |
| .scl_lcnt = 195, |
| .scl_hcnt = 90, |
| .sda_hold = 36, |
| }, |
| }, |
| .pch_thermal_trip = 75, |
| }" |
| |
| # Must leave UART0 enabled or SD/eMMC will not work as PCI |
| register "SerialIoDevMode" = "{ |
| [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| [PchSerialIoIndexI2C1] = PchSerialIoPci, |
| [PchSerialIoIndexI2C2] = PchSerialIoPci, |
| [PchSerialIoIndexI2C3] = PchSerialIoPci, |
| [PchSerialIoIndexI2C4] = PchSerialIoDisabled, |
| [PchSerialIoIndexI2C5] = PchSerialIoDisabled, |
| [PchSerialIoIndexSpi0] = PchSerialIoPci, |
| [PchSerialIoIndexSpi1] = PchSerialIoPci, |
| [PchSerialIoIndexUart0] = PchSerialIoSkipInit, |
| [PchSerialIoIndexUart1] = PchSerialIoDisabled, |
| [PchSerialIoIndexUart2] = PchSerialIoSkipInit, |
| }" |
| |
| register "tcc_offset" = "3" # TCC of 97C |
| register "power_limits_config" = "{ |
| .psys_pmax = 101, |
| }" |
| |
| device domain 0 on |
| device ref system_agent on end |
| device ref igpu on end |
| device ref sa_thermal on end |
| device ref imgu off end |
| device ref south_xhci on end |
| device ref south_xdci on end |
| device ref thermal on end |
| device ref cio off end |
| device ref i2c0 on |
| chip drivers/i2c/generic |
| register "hid" = ""ELAN0001"" |
| register "desc" = ""ELAN Touchscreen"" |
| register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" |
| register "detect" = "1" |
| register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B3)" |
| register "reset_delay_ms" = "20" |
| register "reset_off_delay_ms" = "2" |
| register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B4)" |
| register "enable_delay_ms" = "5" |
| register "enable_off_delay_ms" = "100" |
| register "has_power_resource" = "1" |
| register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C3)" |
| register "stop_off_delay_ms" = "2" |
| device i2c 10 on end |
| end |
| chip drivers/i2c/generic |
| register "hid" = ""RAYD0001"" |
| register "desc" = ""Raydium Touchscreen"" |
| register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" |
| register "detect" = "1" |
| register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B3)" |
| register "reset_delay_ms" = "1" |
| register "reset_off_delay_ms" = "2" |
| register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B4)" |
| register "enable_delay_ms" = "10" |
| register "enable_off_delay_ms" = "100" |
| register "has_power_resource" = "1" |
| register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C3)" |
| register "stop_delay_ms" = "20" |
| register "stop_off_delay_ms" = "2" |
| device i2c 39 on end |
| end |
| chip drivers/i2c/hid |
| register "generic.hid" = ""SYTS7817"" |
| register "generic.desc" = ""Synaptics Touchscreen"" |
| register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" |
| register "generic.detect" = "1" |
| register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B4)" |
| register "generic.enable_delay_ms" = "45" |
| register "generic.has_power_resource" = "1" |
| register "hid_desc_reg_offset" = "0x20" |
| device i2c 20 on end |
| end |
| chip drivers/i2c/hid |
| register "generic.hid" = ""GTCH7503"" |
| register "generic.desc" = ""G2TOUCH Touchscreen"" |
| register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" |
| register "generic.detect" = "1" |
| register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B3)" |
| register "generic.reset_delay_ms" = "50" |
| register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B4)" |
| register "generic.enable_delay_ms" = "1" |
| register "generic.has_power_resource" = "1" |
| register "hid_desc_reg_offset" = "0x01" |
| device i2c 40 on end |
| end |
| end |
| device ref i2c1 on |
| chip drivers/i2c/generic |
| register "hid" = ""ELAN0000"" |
| register "desc" = ""ELAN Touchpad"" |
| register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E3_IRQ)" |
| register "wake" = "GPE0_DW2_16" |
| register "detect" = "1" |
| device i2c 15 on end |
| end |
| chip drivers/i2c/hid |
| register "generic.hid" = ""SYNA0000"" |
| register "generic.cid" = ""ACPI0C50"" |
| register "generic.desc" = ""Synaptics Touchpad"" |
| register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E3_IRQ)" |
| register "generic.wake" = "GPE0_DW2_16" |
| register "generic.detect" = "1" |
| register "hid_desc_reg_offset" = "0x20" |
| device i2c 0x2c on end |
| end |
| end |
| device ref i2c2 on |
| chip drivers/i2c/hid |
| register "generic.hid" = ""WCOM005C"" |
| register "generic.desc" = ""WCOM Digitizer"" |
| register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D1_IRQ)" |
| register "generic.detect" = "1" |
| register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D3)" |
| register "generic.reset_delay_ms" = "20" |
| register "generic.has_power_resource" = "1" |
| register "generic.wake" = "GPE0_DW2_01" |
| register "hid_desc_reg_offset" = "0x1" |
| device i2c 0x9 on end |
| end |
| chip drivers/generic/gpio_keys |
| register "name" = ""PENH"" |
| register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_E8)" |
| register "key.dev_name" = ""INST"" |
| register "key.linux_code" = "SW_PEN_INSERTED" |
| register "key.linux_input_type" = "EV_SW" |
| register "key.label" = ""pen_insert"" |
| register "key.wakeup_route" = "WAKEUP_ROUTE_DISABLED" |
| device generic 0 on end |
| end |
| end |
| device ref i2c3 on |
| chip drivers/generic/max98357a |
| register "hid" = ""MX98357A"" |
| register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A23)" |
| register "sdmode_delay" = "5" |
| device generic 0 on end |
| end |
| chip drivers/i2c/da7219 |
| register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D9_IRQ)" |
| register "btn_cfg" = "50" |
| register "mic_det_thr" = "200" |
| register "jack_ins_deb" = "20" |
| register "jack_det_rate" = ""32ms_64ms"" |
| register "jack_rem_deb" = "1" |
| register "a_d_btn_thr" = "0xa" |
| register "d_b_btn_thr" = "0x16" |
| register "b_c_btn_thr" = "0x21" |
| register "c_mic_btn_thr" = "0x3e" |
| register "btn_avg" = "4" |
| register "adc_1bit_rpt" = "1" |
| register "micbias_lvl" = "2600" |
| register "mic_amp_in_sel" = ""diff"" |
| device i2c 1A on end |
| end |
| end |
| device ref heci1 on end |
| device ref heci2 off end |
| device ref csme_ider off end |
| device ref csme_ktr off end |
| device ref heci3 off end |
| device ref sata off end |
| device ref uart2 on end |
| device ref i2c5 off end |
| device ref i2c4 off end |
| device ref pcie_rp1 on end |
| device ref pcie_rp2 off end |
| device ref pcie_rp3 off end |
| device ref pcie_rp4 on |
| chip drivers/wifi/generic |
| register "wake" = "GPE0_DW2_22" # Wake pin = GPP_E22 |
| device pci 00.0 on end |
| end |
| end |
| device ref pcie_rp5 on end |
| device ref pcie_rp6 off end |
| device ref pcie_rp7 off end |
| device ref pcie_rp8 off end |
| device ref pcie_rp9 on end |
| device ref pcie_rp10 off end |
| device ref pcie_rp11 off end |
| device ref pcie_rp12 off end |
| device ref uart0 on end |
| device ref uart1 off end |
| device ref gspi0 on |
| chip drivers/spi/acpi |
| register "hid" = "ACPI_DT_NAMESPACE_HID" |
| register "compat_string" = ""google,cr50"" |
| register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E0_IRQ)" |
| device spi 0 on end |
| end |
| end |
| device ref gspi1 on |
| chip drivers/spi/acpi |
| register "name" = ""CRFP"" |
| register "hid" = "ACPI_DT_NAMESPACE_HID" |
| register "uid" = "1" |
| register "compat_string" = ""google,cros-ec-spi"" |
| register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B0_IRQ)" |
| register "wake" = "GPE0_DW0_01" # GPP_B1 |
| device spi 0 on end |
| end # FPMCU |
| end |
| device ref emmc on end |
| device ref sdio off end |
| device ref sdxc off end |
| device ref lpc_espi on |
| chip ec/google/chromeec |
| device pnp 0c09.0 on end |
| end |
| end |
| device ref p2sb on end |
| device ref pmc on end |
| device ref hda on end |
| device ref smbus on end |
| device ref fast_spi on end |
| device ref gbe off end |
| end |
| end |