| chip soc/intel/apollolake |
| |
| device cpu_cluster 0 on |
| device lapic 0 on end |
| end |
| |
| register "pcie_rp4_clkreq_pin" = "0" # wifi/bt |
| |
| # TODO(furquan): Remove this once global reset issue is fixed in later |
| # steppings. |
| # Integrated Sensor Hub |
| register "integrated_sensor_hub_enable" = "1" |
| |
| # EMMC TX DATA Delay 1# |
| # 0x0C[14:8] stands for 12*125 = 1500 pSec delay for HS400 |
| # 0x11[6:0] stands for 17*125 = 2125 pSec delay for SDR104/HS200 |
| register "emmc_tx_data_cntl1" = "0x0C11" # HS400 required |
| |
| # EMMC TX DATA Delay 2# |
| # 0x00[30:24] stands for 0*125 = no delay for SDR50 |
| # 0x2B[22:16] stands for 43*125 = 5375 pSec delay for DDR50 |
| # 0x29[14:8] stands for 41*125 = 5125 pSec delay for SDR25/HS50 |
| # 0x29[6:0] stands for 41*125 = 5125 pSec delay for SDR12 |
| register "emmc_tx_data_cntl2" = "0x002B2929" |
| |
| # EMMC RX CMD/DATA Delay 1# |
| # 0x00[30:24] stands for 0*125 = no delay for SDR50 |
| # 0x12[22:16] stands for 18*125 = 2250 pSec delay for DDR50 |
| # 0x57[14:8] stands for 87*125 = 10875 pSec delay for SDR25/HS50 |
| # 0x3B[6:0] stands for 59*125= 7375 pSec delay for SDR12 |
| register "emmc_rx_cmd_data_cntl1" = "0x0012573B" |
| |
| # EMMC RX CMD/DATA Delay 2# |
| # 0x01[17:16] stands for Rx Clock before Output Buffer |
| # 0x00[14:8] stands for 0 delay for Auto Tuning Mode |
| # 0x1C[6:0] stands for 28*125 = 3500 pSec delay for HS200 |
| register "emmc_rx_cmd_data_cntl2" = "0x1001C" |
| |
| # GPE configuration |
| # Note that GPE events called out in ASL code rely on this |
| # route, i.e., if this route changes then the affected GPE |
| # offset bits also need to be changed. This sets the PMC register |
| # GPE_CFG fields. |
| register "gpe0_dw1" = "PMC_GPE_N_31_0" |
| register "gpe0_dw2" = "PMC_GPE_N_63_32" |
| register "gpe0_dw3" = "PMC_GPE_SW_31_0" |
| |
| device domain 0 on |
| device pci 00.0 on end # - Host Bridge |
| device pci 00.1 on end # - DPTF |
| device pci 00.2 on end # - NPK |
| device pci 02.0 on end # - Gen |
| device pci 03.0 on end # - Iunit |
| device pci 0d.0 on end # - P2SB |
| device pci 0d.1 on end # - PMC |
| device pci 0d.2 on end # - SPI |
| device pci 0d.3 on end # - Shared SRAM |
| device pci 0e.0 on # - Audio |
| chip drivers/generic/max98357a |
| register "sdmode_gpio" = "ACPI_GPIO_OUTPUT(GPIO_76)" |
| device generic 0 on end |
| end |
| end |
| device pci 11.0 on end # - ISH |
| device pci 12.0 off end # - SATA |
| device pci 13.0 off end # - Root Port 2 - PCIe-A 0 |
| device pci 13.1 off end # - Root Port 3 - PCIe-A 1 |
| device pci 13.2 off end # - Root Port 4 - PCIe-A 2 |
| device pci 13.3 off end # - Root Port 5 - PCIe-A 3 |
| device pci 14.0 on end # - Root Port 0 - PCIe-B 0 - Wifi |
| device pci 14.1 off end # - Root Port 1 - PCIe-B 1 |
| device pci 15.0 on end # - XHCI |
| device pci 15.1 off end # - XDCI |
| device pci 16.0 on # - I2C 0 |
| chip drivers/i2c/da7219 |
| register "irq" = "IRQ_LEVEL_LOW(GPIO_116_IRQ)" |
| register "btn_cfg" = "50" |
| register "mic_det_thr" = "500" |
| register "jack_ins_deb" = "20" |
| register "jack_det_rate" = ""32ms_64ms"" |
| register "jack_rem_deb" = "1" |
| register "a_d_btn_thr" = "0xa" |
| register "d_b_btn_thr" = "0x16" |
| register "b_c_btn_thr" = "0x21" |
| register "c_mic_btn_thr" = "0x3e" |
| register "btn_avg" = "4" |
| register "adc_1bit_rpt" = "1" |
| register "micbias_lvl" = "2600" |
| register "mic_amp_in_sel" = ""diff"" |
| device i2c 1a on end |
| end |
| end |
| device pci 16.1 on end # - I2C 1 |
| device pci 16.2 on end # - I2C 2 |
| device pci 16.3 on |
| chip drivers/i2c/generic |
| register "hid" = ""ELAN0001"" |
| register "desc" = ""ELAN Touchscreen"" |
| register "irq" = "IRQ_EDGE_LOW(GPIO_21_IRQ)" |
| device i2c 10 on end |
| end |
| end # - I2C 3 |
| device pci 17.0 on |
| chip drivers/i2c/generic |
| register "hid" = ""ELAN0000"" |
| register "desc" = ""ELAN Touchpad"" |
| register "irq" = "IRQ_EDGE_LOW(GPIO_18_IRQ)" |
| device i2c 15 on end |
| end |
| end # - I2C 4 |
| device pci 17.1 on end # - I2C 5 |
| device pci 17.2 on end # - I2C 6 |
| device pci 17.3 on end # - I2C 7 |
| device pci 18.0 on end # - UART 0 |
| device pci 18.1 on end # - UART 1 |
| device pci 18.2 on end # - UART 2 |
| device pci 18.3 on end # - UART 3 |
| device pci 19.0 on end # - SPI 0 |
| device pci 19.1 on end # - SPI 1 |
| device pci 19.2 on end # - SPI 2 |
| device pci 1a.0 on end # - PWM |
| device pci 1b.0 on end # - SDCARD |
| device pci 1c.0 on end # - eMMC |
| device pci 1e.0 off end # - SDIO |
| device pci 1f.0 on # - LPC |
| chip ec/google/chromeec |
| device pnp 0c09.0 on end |
| end |
| end |
| device pci 1f.1 on end # - SMBUS |
| end |
| end |