cbfs: Enable CBFS mcache on most chipsets
This patch flips the default of CONFIG_NO_CBFS_MCACHE so the feature is
enabled by default. Some older chipsets with insufficient SRAM/CAR space
still have it explicitly disabled. All others get the new section added
to their memlayout... 8K seems like a sane default to start with.
Change-Id: I0abd1c813aece6e78fb883f292ce6c9319545c44
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/soc/nvidia/tegra124/memlayout.ld b/src/soc/nvidia/tegra124/memlayout.ld
index 94b6fd8..f661d2a 100644
--- a/src/soc/nvidia/tegra124/memlayout.ld
+++ b/src/soc/nvidia/tegra124/memlayout.ld
@@ -16,7 +16,8 @@
TTB(0x40000000, 16K + 32)
PRERAM_CBMEM_CONSOLE(0x40004020, 6K - 32)
FMAP_CACHE(0x40005800, 2K)
- PRERAM_CBFS_CACHE(0x40006000, 14K)
+ CBFS_MCACHE(0x40006000, 8K)
+ PRERAM_CBFS_CACHE(0x40008000, 6K)
VBOOT2_WORK(0x40009800, 12K)
TPM_TCPA_LOG(0x4000D800, 2K)
STACK(0x4000E000, 8K)
diff --git a/src/soc/nvidia/tegra210/memlayout.ld b/src/soc/nvidia/tegra210/memlayout.ld
index e5620bc..42f2164 100644
--- a/src/soc/nvidia/tegra210/memlayout.ld
+++ b/src/soc/nvidia/tegra210/memlayout.ld
@@ -17,7 +17,8 @@
SRAM_START(0x40000000)
PRERAM_CBMEM_CONSOLE(0x40000000, 2K)
FMAP_CACHE(0x40000800, 2K)
- PRERAM_CBFS_CACHE(0x40001000, 28K)
+ PRERAM_CBFS_CACHE(0x40001000, 20K)
+ CBFS_MCACHE(0x40006000, 8K)
VBOOT2_WORK(0x40008000, 12K)
TPM_TCPA_LOG(0x4000B000, 2K)
#if ENV_ARM64