commit ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1
author Elyes HAOUAS <ehaouas@noos.fr> Wed Aug 31 19:22:16 2016 +0200
committer Martin Roth <martinroth@google.com> Wed Aug 31 20:22:46 2016 +0200
tree 9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f
parent 2e4d80687dd79890c7c9edad8dbaf6e89edf2afc

src/southbridge: Code formating

Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16291
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)

src/southbridge/intel/bd82x6x/lpc.c

diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 1106912..9041816 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -125,7 +125,7 @@
 	pci_write_config8(dev, PIRQG_ROUT, pirq_routing);
 	pci_write_config8(dev, PIRQH_ROUT, pirq_routing);
 
-	for(irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) {
+	for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) {
 		u8 int_pin=0;
 
 		if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI)