| chip northbridge/amd/amdk8/root_complex |
| device lapic_cluster 0 on |
| chip cpu/amd/socket_F |
| device lapic 0 on end |
| end |
| end |
| device pci_domain 0 on |
| chip northbridge/amd/amdk8 #mc0 |
| device pci 18.0 on |
| # devices on link 0, link 0 == LDT 0 |
| chip southbridge/nvidia/mcp55 |
| device pci 0.0 on end # HT |
| device pci 1.0 on # LPC |
| chip superio/winbond/w83627ehg |
| device pnp 2e.0 off # Floppy |
| io 0x60 = 0x3f0 |
| irq 0x70 = 6 |
| drq 0x74 = 2 |
| end |
| device pnp 2e.1 off # Parallel Port |
| io 0x60 = 0x378 |
| irq 0x70 = 7 |
| end |
| device pnp 2e.2 on # Com1 |
| io 0x60 = 0x3f8 |
| irq 0x70 = 4 |
| end |
| device pnp 2e.3 off # Com2 |
| io 0x60 = 0x2f8 |
| irq 0x70 = 3 |
| end |
| device pnp 2e.5 on # Keyboard |
| io 0x60 = 0x60 |
| io 0x62 = 0x64 |
| irq 0x70 = 1 |
| irq 0x72 = 12 |
| end |
| device pnp 2e.6 off # SFI |
| io 0x62 = 0x100 |
| end |
| device pnp 2e.7 off # GPIO_GAME_MIDI |
| io 0x60 = 0x220 |
| io 0x62 = 0x300 |
| irq 0x70 = 9 |
| end |
| device pnp 2e.8 off end # WDTO_PLED |
| device pnp 2e.9 off end # GPIO_SUSLED |
| device pnp 2e.a off end # ACPI |
| device pnp 2e.b on # HW Monitor |
| io 0x60 = 0x290 |
| irq 0x70 = 5 |
| end |
| end |
| end |
| device pci 1.1 on # SM 0 |
| chip drivers/generic/generic #dimm 0-0-0 |
| device i2c 50 on end |
| end |
| chip drivers/generic/generic #dimm 0-0-1 |
| device i2c 51 on end |
| end |
| chip drivers/generic/generic #dimm 0-1-0 |
| device i2c 52 on end |
| end |
| chip drivers/generic/generic #dimm 0-1-1 |
| device i2c 53 on end |
| end |
| chip drivers/generic/generic #dimm 1-0-0 |
| device i2c 54 on end |
| end |
| chip drivers/generic/generic #dimm 1-0-1 |
| device i2c 55 on end |
| end |
| chip drivers/generic/generic #dimm 1-1-0 |
| device i2c 56 on end |
| end |
| chip drivers/generic/generic #dimm 1-1-1 |
| device i2c 57 on end |
| end |
| end # SM |
| device pci 1.1 on # SM 1 |
| #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? |
| # chip drivers/generic/generic #PCIXA Slot1 |
| # device i2c 50 on end |
| # end |
| # chip drivers/generic/generic #PCIXB Slot1 |
| # device i2c 51 on end |
| # end |
| # chip drivers/generic/generic #PCIXB Slot2 |
| # device i2c 52 on end |
| # end |
| # chip drivers/generic/generic #PCI Slot1 |
| # device i2c 53 on end |
| # end |
| # chip drivers/generic/generic #Master MCP55 PCI-E |
| # device i2c 54 on end |
| # end |
| # chip drivers/generic/generic #Slave MCP55 PCI-E |
| # device i2c 55 on end |
| # end |
| chip drivers/generic/generic #MAC EEPROM |
| device i2c 51 on end |
| end |
| |
| end # SM |
| device pci 2.0 on end # USB 1.1 |
| device pci 2.1 on end # USB 2 |
| device pci 4.0 on end # IDE |
| device pci 5.0 on end # SATA 0 |
| device pci 5.1 on end # SATA 1 |
| device pci 5.2 on end # SATA 2 |
| device pci 6.0 on end # PCI |
| device pci 6.1 on end # AZA |
| device pci 8.0 on end # NIC |
| device pci 9.0 on end # NIC |
| device pci a.0 on end # PCI E 5 |
| device pci b.0 off end # PCI E 4 |
| device pci c.0 off end # PCI E 3 |
| device pci d.0 on end # PCI E 2 |
| device pci e.0 off end # PCI E 1 |
| device pci f.0 on end # PCI E 0 |
| register "ide0_enable" = "1" |
| register "sata0_enable" = "1" |
| register "sata1_enable" = "1" |
| register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 |
| register "mac_eeprom_addr" = "0x51" |
| end |
| end # device pci 18.0 |
| device pci 18.0 on end # Link 1 |
| device pci 18.0 on |
| # devices on link 2, link 2 == LDT 2 |
| chip southbridge/nvidia/mcp55 |
| device pci 0.0 on end # HT |
| device pci 1.0 on end # LPC |
| device pci 1.1 on end # SM 0 |
| device pci 2.0 off end # USB 1.1 |
| device pci 2.1 off end # USB 2 |
| device pci 4.0 off end # IDE |
| device pci 5.0 on end # SATA 0 |
| device pci 5.1 on end # SATA 1 |
| device pci 5.2 on end # SATA 2 |
| device pci 6.0 off end # PCI |
| device pci 6.1 off end # AZA |
| device pci 8.0 on end # NIC |
| device pci 9.0 on end # NIC |
| device pci a.0 on end # PCI E 5 |
| device pci b.0 off end # PCI E 4 |
| device pci c.0 off end # PCI E 3 |
| device pci d.0 on end # PCI E 2 |
| device pci e.0 on end # PCI E 1 |
| device pci f.0 on end # PCI E 0 |
| register "ide0_enable" = "1" |
| register "sata0_enable" = "1" |
| register "sata1_enable" = "1" |
| register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 |
| register "mac_eeprom_addr" = "0x51" |
| end |
| end # device pci 18.0 |
| device pci 18.1 on end |
| device pci 18.2 on end |
| device pci 18.3 on end |
| end # mc0 |
| |
| end # PCI domain |
| |
| # chip drivers/generic/debug |
| # device pnp 0.0 off end # chip name |
| # device pnp 0.1 on end # pci_regs_all |
| # device pnp 0.2 on end # mem |
| # device pnp 0.3 off end # cpuid |
| # device pnp 0.4 on end # smbus_regs_all |
| # device pnp 0.5 off end # dual core msr |
| # device pnp 0.6 off end # cache size |
| # device pnp 0.7 off end # tsc |
| # device pnp 0.8 off end # io |
| # device pnp 0.9 off end # io |
| # end |
| end #root_complex |