| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright (C) 2009 One Laptop per Child, Association, Inc. |
| ## |
| ## This program is free software; you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation; either version 2 of the License, or |
| ## (at your option) any later version. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| ## You should have received a copy of the GNU General Public License |
| ## along with this program; if not, write to the Free Software |
| ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| ## |
| |
| ## CONFIG_XIP_ROM_SIZE must be a power of 2. |
| default CONFIG_XIP_ROM_SIZE = 64 * 1024 |
| include /config/nofailovercalculation.lb |
| |
| arch i386 end |
| driver mainboard.o |
| driver wakeup.o |
| if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end |
| if CONFIG_GENERATE_MP_TABLE object mptable.o end |
| if CONFIG_GENERATE_ACPI_TABLES |
| object fadt.o |
| object dsdt.o |
| # object ssdt.o |
| object acpi_tables.o |
| end |
| # These lines maybe noused. |
| makerule ./failover.E |
| depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc" |
| action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" |
| end |
| makerule ./failover.inc |
| depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ./romcc" |
| action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" |
| end |
| if CONFIG_USE_DCACHE_RAM |
| if CONFIG_USE_INIT |
| makerule ./cache_as_ram_auto.o |
| depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h" |
| action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@" |
| end |
| else |
| makerule ./cache_as_ram_auto.inc |
| depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h" |
| action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@" |
| action "perl -e 's/.rodata/.rom.data/g' -pi $@" |
| action "perl -e 's/.text/.section .rom.text/g' -pi $@" |
| end |
| end |
| end |
| mainboardinit cpu/x86/16bit/entry16.inc |
| ldscript /cpu/x86/16bit/entry16.lds |
| |
| mainboardinit northbridge/via/vx800/romstrap.inc |
| ldscript /northbridge/via/vx800/romstrap.lds |
| |
| mainboardinit cpu/x86/32bit/entry32.inc |
| ldscript /cpu/x86/32bit/entry32.lds |
| if CONFIG_USE_FALLBACK_IMAGE |
| mainboardinit cpu/x86/16bit/reset16.inc |
| ldscript /cpu/x86/16bit/reset16.lds |
| else |
| mainboardinit cpu/x86/32bit/reset32.inc |
| ldscript /cpu/x86/32bit/reset32.lds |
| end |
| |
| # mainboardinit arch/i386/lib/cpu_reset.inc |
| # Here cpu_reset.inc have label _cpu_reset, which is needed in failover.c, |
| # but cpu_reset.inc also has code to jump to __main() which is not included |
| # in cache_as_ram_auto_auto.c. |
| |
| mainboardinit arch/i386/lib/id.inc |
| ldscript /arch/i386/lib/id.lds |
| |
| if CONFIG_USE_DCACHE_RAM |
| mainboardinit cpu/via/car/cache_as_ram.inc |
| end |
| |
| if CONFIG_USE_FALLBACK_IMAGE |
| ldscript /arch/i386/lib/failover.lds |
| # failover.inc need definition in cpu_reset.inc, but we do not include |
| # cpu_reset.inc,so ... |
| # mainboardinit ./failover.inc |
| end |
| # mainboardinit cpu/x86/fpu/enable_fpu.inc |
| # mainboardinit cpu/x86/mmx/enable_mmx.inc |
| |
| if CONFIG_USE_DCACHE_RAM |
| if CONFIG_USE_INIT |
| initobject cache_as_ram_auto.o |
| else |
| mainboardinit ./cache_as_ram_auto.inc |
| end |
| end |
| |
| # mainboardinit cpu/x86/mmx/disable_mmx.inc |
| dir /pc80 |
| |
| config chip.h |
| |
| chip northbridge/via/vx800 # Northbridge |
| device pci_domain 0 on |
| device pci 0.0 on end # Host Bridge |
| device pci 0.1 on end # Error Reporting |
| device pci 0.2 on end # Host Bus Control |
| device pci 0.3 on end # PCI to PCI Bridge |
| device pci 0.4 on end # Power Management |
| device pci 0.5 on end # APIC and Central Traffic Control |
| device pci 0.6 on end # Scratch Registers |
| device pci 0.7 on end # North-South Module Interface Control |
| device pci 1.0 on end # PCI Bridge |
| device pci f.0 on end # IDE/SATA |
| # device pci f.1 on end # IDE |
| device pci 10.0 on end # USB 1.1 |
| device pci 10.1 on end # USB 1.1 |
| device pci 10.2 on end # USB 1.1 |
| device pci 10.4 on end # USB 2.0 |
| device pci 11.0 on # Bus Control and Power Management (SB, LPC) |
| chip superio/winbond/w83697hf |
| # TODO: Check all devices, this may need some more work. |
| device pnp 2e.0 off # Floppy (N/A?) |
| io 0x60 = 0x3f0 |
| irq 0x70 = 6 |
| drq 0x74 = 2 |
| end |
| device pnp 2e.1 off # Parallel Port (N/A?) |
| io 0x60 = 0x378 |
| irq 0x70 = 7 |
| drq 0x74 = 4 |
| end |
| device pnp 2e.2 on # COM1 |
| io 0x60 = 0x3f8 |
| irq 0x70 = 4 |
| end |
| device pnp 2e.3 on # COM2 |
| io 0x60 = 0x2f8 |
| irq 0x70 = 3 |
| end |
| device pnp 2e.6 off end # Consumer IR |
| device pnp 2e.7 off end # Game port, GPIO 1 |
| device pnp 2e.8 off end # MIDI port, GPIO 5 |
| device pnp 2e.9 off end # GPIO 2-4 |
| device pnp 2e.a off end # ACPI |
| device pnp 2e.b on # HWM |
| io 0x60 = 0x290 |
| end |
| end |
| end |
| device pci 11.7 on end # North-South Module Interface Control |
| device pci 14.0 on end # HD Audio (Azalia) |
| end |
| device apic_cluster 0 on # APIC cluster |
| chip cpu/via/model_c7 # VIA C7 |
| device apic 0 on end # APIC |
| end |
| end |
| end |