soc/amd/stoneyridge: add chipset devicetrees
Add chipset devicetrees for Stoneyridge and Carrizo, which is also
supported by the Stoneyridge code, but has more external PCIe ports and
devices. The mainboard's devicetrees will be changed to use the aliases
defined in the chipset devicetree in follow-up patches. This is a
preparation to statically assign the ops for the internal devices
statically in the SoC devicetree instead of dynamically adding them in
ramstage.
BKDG #55072 Rev 3.04 was used to check the PCI devices and functions and
the MMIO addresses.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia45260b1168ed1d99993adfb98475da5b5c90d11
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68316
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 26dca89..53b986e 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -77,6 +77,12 @@
default "FP4" if AMD_APU_PKG_FP4
default "FT4" if AMD_APU_PKG_FT4
+config CHIPSET_DEVICETREE
+ string
+ default "soc/amd/stoneyridge/chipset_cz.cb" if AMD_APU_MERLINFALCON
+ default "soc/amd/stoneyridge/chipset_st.cb" if AMD_APU_PRAIRIEFALCON
+ default "soc/amd/stoneyridge/chipset_st.cb" if AMD_APU_STONEYRIDGE
+
config VBOOT
select VBOOT_STARTS_IN_BOOTBLOCK
select VBOOT_VBNV_CMOS