soc/amd/stoneyridge: add chipset devicetrees
Add chipset devicetrees for Stoneyridge and Carrizo, which is also
supported by the Stoneyridge code, but has more external PCIe ports and
devices. The mainboard's devicetrees will be changed to use the aliases
defined in the chipset devicetree in follow-up patches. This is a
preparation to statically assign the ops for the internal devices
statically in the SoC devicetree instead of dynamically adding them in
ramstage.
BKDG #55072 Rev 3.04 was used to check the PCI devices and functions and
the MMIO addresses.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia45260b1168ed1d99993adfb98475da5b5c90d11
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68316
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 26dca89..53b986e 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -77,6 +77,12 @@
default "FP4" if AMD_APU_PKG_FP4
default "FT4" if AMD_APU_PKG_FT4
+config CHIPSET_DEVICETREE
+ string
+ default "soc/amd/stoneyridge/chipset_cz.cb" if AMD_APU_MERLINFALCON
+ default "soc/amd/stoneyridge/chipset_st.cb" if AMD_APU_PRAIRIEFALCON
+ default "soc/amd/stoneyridge/chipset_st.cb" if AMD_APU_STONEYRIDGE
+
config VBOOT
select VBOOT_STARTS_IN_BOOTBLOCK
select VBOOT_VBNV_CMOS
diff --git a/src/soc/amd/stoneyridge/chipset_cz.cb b/src/soc/amd/stoneyridge/chipset_cz.cb
new file mode 100644
index 0000000..22dc418
--- /dev/null
+++ b/src/soc/amd/stoneyridge/chipset_cz.cb
@@ -0,0 +1,44 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+chip soc/amd/stoneyridge
+ device cpu_cluster 0 on
+ end
+ device domain 0 on
+ device pci 00.0 alias gnb on end
+ device pci 00.2 alias iommu off end
+ device pci 01.0 alias gfx off end # internal GPU
+ device pci 01.1 alias gfx_hda off end # display HD Audio controller
+ device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.1 alias gpp_bridge_0 off end
+ device pci 02.2 alias gpp_bridge_1 off end
+ device pci 02.3 alias gpp_bridge_2 off end
+ device pci 02.4 alias gpp_bridge_3 off end
+ device pci 02.5 alias gpp_bridge_4 off end
+ device pci 03.0 on end # Dummy Host Bridge, do not disable
+ device pci 03.1 alias gfx_bridge_0 off end
+ device pci 03.2 alias gfx_bridge_1 off end
+ device pci 03.3 alias gfx_bridge_2 off end
+ device pci 03.4 alias gfx_bridge_3 off end
+ device pci 03.5 alias gfx_bridge_4 off end
+ device pci 08.0 alias crypto on end # cryptography coprocessor / PSP
+ device pci 09.0 alias hda_bridge off end # host audio bridge
+ device pci 09.2 alias hda off end # main HD Audio Controller
+ device pci 10.0 alias xhci off end
+ device pci 11.0 alias sata off end
+ device pci 12.0 alias ehci off end
+ device pci 14.0 alias smbus on end # primary FCH function
+ device pci 14.3 alias lpc_bridge on end
+ device pci 14.7 alias sdhci off end
+ device pci 18.0 alias ht_0 on end
+ device pci 18.1 alias ht_1 on end
+ device pci 18.2 alias ht_2 on end
+ device pci 18.3 alias ht_3 on end
+ device pci 18.4 alias ht_4 on end
+ device pci 18.5 alias ht_5 on end
+ end
+
+ device mmio 0xfedc2000 alias i2c_0 off end
+ device mmio 0xfedc3000 alias i2c_1 off end
+ device mmio 0xfedc4000 alias i2c_2 off end
+ device mmio 0xfedc5000 alias i2c_3 off end
+end
diff --git a/src/soc/amd/stoneyridge/chipset_st.cb b/src/soc/amd/stoneyridge/chipset_st.cb
new file mode 100644
index 0000000..d150c18
--- /dev/null
+++ b/src/soc/amd/stoneyridge/chipset_st.cb
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+chip soc/amd/stoneyridge
+ device cpu_cluster 0 on
+ end
+ device domain 0 on
+ device pci 00.0 alias gnb on end
+ device pci 00.2 alias iommu off end
+ device pci 01.0 alias gfx off end # internal GPU
+ device pci 01.1 alias gfx_hda off end # display HD Audio controller
+ device pci 02.0 on end # Dummy Host Bridge, do not disable
+ device pci 02.1 alias gpp_bridge_0 off end
+ device pci 02.2 alias gpp_bridge_1 off end
+ device pci 02.3 alias gpp_bridge_2 off end
+ device pci 02.4 alias gpp_bridge_3 off end
+ device pci 02.5 alias gpp_bridge_4 off end
+ device pci 08.0 alias crypto on end # cryptography coprocessor / PSP
+ device pci 09.0 alias hda_bridge off end # host audio bridge
+ device pci 09.2 alias hda off end # main HD Audio Controller
+ device pci 10.0 alias xhci off end
+ device pci 11.0 alias sata off end
+ device pci 12.0 alias ehci off end
+ device pci 14.0 alias smbus on end # primary FCH function
+ device pci 14.3 alias lpc_bridge on end
+ device pci 14.7 alias sdhci off end
+ device pci 18.0 alias ht_0 on end
+ device pci 18.1 alias ht_1 on end
+ device pci 18.2 alias ht_2 on end
+ device pci 18.3 alias ht_3 on end
+ device pci 18.4 alias ht_4 on end
+ device pci 18.5 alias ht_5 on end
+ end
+
+ device mmio 0xfedc2000 alias i2c_0 off end
+ device mmio 0xfedc3000 alias i2c_1 off end
+ device mmio 0xfedc4000 alias i2c_2 off end
+ device mmio 0xfedc5000 alias i2c_3 off end
+end