Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
b5df65a9aaee50421913ace6d7a4b35e0ddff676
/
.
/
src
/
mainboard
/
intel
/
strago
/
ramstage.c
blob: e7ed5004978a887212c9518ebecdbcf7f49adb7c [
file
] [
log
] [
blame
]
/* SPDX-License-Identifier: GPL-2.0-only */
#include
<soc/ramstage.h>
#include
"onboard.h"
void
mainboard_silicon_init_params
(
SILICON_INIT_UPD
*
params
)
{
params
->
ChvSvidConfig
=
SVID_PMIC_CONFIG
;
params
->
PMIC_I2CBus
=
BCRD2_PMIC_I2C_BUS
;
}