blob: 5e527645508955afdfdbb1913954afa70c5ff243 [file] [log] [blame]
chip northbridge/intel/sandybridge
chip cpu/intel/model_206ax
device cpu_cluster 0 on end
register "tcc_offset" = "5" # TCC of 95C
end
device domain 0 on
device ref host_bridge on end # Host bridge Host bridge
device ref peg10 on # PEG1 (blue slot1)
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthLong" "SLOT1" "SlotDataBusWidth16X"
end
device ref igd on end # Internal graphics VGA controller
device ref peg60 off end # PEG2
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "gpe0_en" = "0x00002a46"
register "alt_gp_smi_en" = "0x0004"
register "gpi2_routing" = "1"
register "gpi12_routing" = "2"
register "gen1_dec" = "0x007c0a01"
register "gen2_dec" = "0x007c0901"
register "gen3_dec" = "0x003c07e1"
register "gen4_dec" = "0x001c0901"
register "pcie_port_coalesce" = "true"
register "sata_interface_speed_support" = "0x3"
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x08040201"
register "xhci_switchable_ports" = "0x0000000f"
device ref xhci on end # USB 3.0 Controller
device ref mei1 off end # Management Engine Interface 1
device ref mei2 off end # Management Engine Interface 2
device ref me_ide_r off end # Management Engine IDE-R
device ref me_kt off end # Management Engine KT
device ref gbe on end # Intel Gigabit Ethernet
device ref ehci2 on end # USB2 EHCI #2
device ref hda on end # High Definition Audio controller
device ref pcie_rp1 off end # PCIe Port #1
device ref pcie_rp2 off end # PCIe Port #2
device ref pcie_rp3 off end # PCIe Port #3
device ref pcie_rp4 off end # PCIe Port #4
device ref pcie_rp5 off end # PCIe Port #5
device ref pcie_rp6 off end # PCIe Port #6
device ref pcie_rp7 off end # PCIe Port #7
device ref pcie_rp8 off end # PCIe Port #8
device ref ehci1 on end # USB2 EHCI #1
device ref pci_bridge off end # PCI bridge
device ref lpc on # LPC bridge
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
chip superio/smsc/sch5545
device pnp 2e.c on # LPC
io 0x60 = 0x2e
end
device pnp 2e.0 on # EMI
io 0x60 = 0xa40
end
device pnp 2e.1 on # KBC/PS2M
io 0x60 = 0x60
irq 0x70 = 1
irq 0x72 = 12
end
device pnp 2e.7 on # UART1
io 0x60 = 0x3f8
irq 0x70 = 4
irq 0xf0 = 0x02
end
device pnp 2e.8 off end # UART2
device pnp 2e.a on # Runtime registers
io 0x60 = 0xa00
irq 0x70 = 9 # PME
end
device pnp 2e.b off end # Floppy
device pnp 2e.11 off end # PP
end
end
device ref sata1 on end # SATA Controller 1
device ref smbus on end # SMBus
device ref sata2 off end # SATA Controller 2
device ref thermal on end # Thermal
end
end
end