src/mainboard/asrock/h110m/ramstage.c

/* SPDX-License-Identifier: GPL-2.0-only */

#include <soc/ramstage.h>
#include "include/gpio.h"

void mainboard_silicon_init_params(FSP_SIL_UPD *params)
{
	/* Configure pads prior to SiliconInit() in case there's any
	 * dependencies during hardware initialization. */
	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));

	params->CdClock = 3;
}