src/mainboard/asus/a8n_e/Options.lb - coreboot - Gitiles

 ##
 ## This file is part of the coreboot project.
 ##
 ## Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de>
 ## (Thanks to LSRA University of Mannheim for their support)
 ##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
 ##
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
 ##
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##

 uses CONFIG_HAVE_MP_TABLE
 uses CONFIG_CBFS
 uses CONFIG_HAVE_PIRQ_TABLE
 uses CONFIG_USE_FALLBACK_IMAGE
 uses CONFIG_USE_FAILOVER_IMAGE
 uses CONFIG_HAVE_FALLBACK_BOOT
 uses CONFIG_HAVE_FAILOVER_BOOT
 uses CONFIG_HAVE_HARD_RESET
 uses CONFIG_IRQ_SLOT_COUNT
 uses CONFIG_HAVE_OPTION_TABLE
 uses CONFIG_MAX_CPUS
 uses CONFIG_MAX_PHYSICAL_CPUS
 uses CONFIG_LOGICAL_CPUS
 uses CONFIG_IOAPIC
 uses CONFIG_SMP
 uses CONFIG_FALLBACK_SIZE
 uses CONFIG_FAILOVER_SIZE
 uses CONFIG_ROM_SIZE
 uses CONFIG_ROM_SECTION_SIZE
 uses CONFIG_ROM_IMAGE_SIZE
 uses CONFIG_ROM_SECTION_SIZE
 uses CONFIG_ROM_SECTION_OFFSET
 uses CONFIG_ROM_PAYLOAD
 uses CONFIG_ROM_PAYLOAD_START
 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
 uses CONFIG_PRECOMPRESSED_PAYLOAD
 uses CONFIG_PAYLOAD_SIZE
 uses CONFIG_ROMBASE
 uses CONFIG_XIP_ROM_SIZE
 uses CONFIG_XIP_ROM_BASE
 uses CONFIG_STACK_SIZE
 uses CONFIG_HEAP_SIZE
 uses CONFIG_USE_OPTION_TABLE
 uses CONFIG_LB_CKS_RANGE_START
 uses CONFIG_LB_CKS_RANGE_END
 uses CONFIG_LB_CKS_LOC
 uses CONFIG_MAINBOARD_PART_NUMBER
 uses CONFIG_MAINBOARD_VENDOR
 uses CONFIG_MAINBOARD
 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
 uses COREBOOT_EXTRA_VERSION
 uses CONFIG_RAMBASE
 uses CONFIG_GDB_STUB
 uses CONFIG_CROSS_COMPILE
 uses CC
 uses HOSTCC
 uses CONFIG_OBJCOPY
 uses CONFIG_TTYS0_BAUD
 uses CONFIG_TTYS0_BASE
 uses CONFIG_TTYS0_LCS
 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
 uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
 uses CONFIG_CONSOLE_SERIAL8250
 uses CONFIG_CONSOLE_BTEXT
 uses CONFIG_HAVE_INIT_TIMER
 uses CONFIG_GDB_STUB
 uses CONFIG_CONSOLE_VGA
 uses CONFIG_PCI_ROM_RUN
 uses CONFIG_HW_MEM_HOLE_SIZEK
 uses CONFIG_USE_DCACHE_RAM
 uses CONFIG_DCACHE_RAM_BASE
 uses CONFIG_DCACHE_RAM_SIZE
 uses CONFIG_USE_INIT
 uses CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE
 uses CONFIG_AP_CODE_IN_CAR
 uses CONFIG_MEM_TRAIN_SEQ
 uses CONFIG_WAIT_BEFORE_CPUS_INIT
 uses CONFIG_ENABLE_APIC_EXT_ID
 uses CONFIG_APIC_ID_OFFSET
 uses CONFIG_LIFT_BSP_APIC_ID
 uses CONFIG_PCI_64BIT_PREF_MEM
 uses CONFIG_HT_CHAIN_UNITID_BASE
 uses CONFIG_HT_CHAIN_END_UNITID_BASE
 uses CONFIG_SB_HT_CHAIN_ON_BUS0
 uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
 uses CONFIG_LB_MEM_TOPK
 uses CONFIG_USE_PRINTK_IN_CAR

 default CONFIG_ROM_SIZE = 512 * 1024
 default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 - CONFIG_FAILOVER_SIZE
 default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
 default CONFIG_FAILOVER_SIZE = 4 * 1024
 default CONFIG_HAVE_FALLBACK_BOOT = 1
 default CONFIG_HAVE_FAILOVER_BOOT = 1
 default CONFIG_HAVE_HARD_RESET = 1
 default CONFIG_HAVE_PIRQ_TABLE = 1
 default CONFIG_IRQ_SLOT_COUNT = 13
 default CONFIG_HAVE_MP_TABLE = 1
 default CONFIG_HAVE_OPTION_TABLE = 1
 # Move the default coreboot CMOS range off of AMD RTC registers.
 default CONFIG_LB_CKS_RANGE_START = 49
 default CONFIG_LB_CKS_RANGE_END = 122
 default CONFIG_LB_CKS_LOC = 123
 # SMP support (only worry about 2 micro processors).
 default CONFIG_SMP = 1
 default CONFIG_MAX_CPUS = 2
 default CONFIG_MAX_PHYSICAL_CPUS = 1
 default CONFIG_LOGICAL_CPUS = 1
 # 1G memory hole.
 default CONFIG_HW_MEM_HOLE_SIZEK = 0x100000
 # HT Unit ID offset, default is 1, the typical one.
 default CONFIG_HT_CHAIN_UNITID_BASE = 0
 # Real SB Unit ID, default is 0x20, mean don't touch it at last.
 # default CONFIG_HT_CHAIN_END_UNITID_BASE = 0x10
 # Make the SB HT chain on bus 0, default is not (0).
 default CONFIG_SB_HT_CHAIN_ON_BUS0 = 2
 # Only offset for SB chain?, default is yes(1).
 default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0
 # default CONFIG_CONSOLE_BTEXT = 1		# BTEXT console
 default CONFIG_CONSOLE_VGA = 1			# For VGA console
 default CONFIG_PCI_ROM_RUN = 1			# For VGA console
 default CONFIG_USE_DCACHE_RAM = 1
 default CONFIG_DCACHE_RAM_BASE = 0xc8000
 default CONFIG_DCACHE_RAM_SIZE = 32 * 1024
 default CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4 * 1024
 default CONFIG_USE_INIT = 0
 default CONFIG_AP_CODE_IN_CAR = 0
 default CONFIG_MEM_TRAIN_SEQ = 2
 default CONFIG_WAIT_BEFORE_CPUS_INIT = 0
 # default CONFIG_ENABLE_APIC_EXT_ID = 0
 # default CONFIG_APIC_ID_OFFSET = 0x10
 # default CONFIG_LIFT_BSP_APIC_ID = 0
 # default CONFIG_PCI_64BIT_PREF_MEM = 1
 default CONFIG_IOAPIC = 1
 default CONFIG_MAINBOARD_PART_NUMBER = "A8N-E"
 default CONFIG_MAINBOARD_VENDOR = "ASUS"
 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1043
 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x815a
 default CONFIG_STACK_SIZE = 8 * 1024
 default CONFIG_HEAP_SIZE = 16 * 1024
 # Only use the option table in a normal image.
 default CONFIG_USE_OPTION_TABLE = (!CONFIG_USE_FALLBACK_IMAGE) && (!CONFIG_USE_FAILOVER_IMAGE)
 default CONFIG_RAMBASE = 0x00004000
 default CONFIG_ROM_PAYLOAD = 1
 default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32"
 default HOSTCC = "gcc"
 default CONFIG_GDB_STUB = 0
 default CONFIG_USE_PRINTK_IN_CAR=1
 default CONFIG_CONSOLE_SERIAL8250 = 1
 default CONFIG_TTYS0_BAUD = 115200
 default CONFIG_TTYS0_BASE = 0x3f8
 default CONFIG_TTYS0_LCS = 0x3
 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8
 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8
 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"

 #
 # CBFS
 #
 #
 default CONFIG_CBFS=1
 end
	##
	## This file is part of the coreboot project.
	##
	## Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de>
	## (Thanks to LSRA University of Mannheim for their support)
	##
	## This program is free software; you can redistribute it and/or modify
	## it under the terms of the GNU General Public License as published by
	## the Free Software Foundation; either version 2 of the License, or
	## (at your option) any later version.
	##
	## This program is distributed in the hope that it will be useful,
	## but WITHOUT ANY WARRANTY; without even the implied warranty of
	## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	## GNU General Public License for more details.
	##
	## You should have received a copy of the GNU General Public License
	## along with this program; if not, write to the Free Software
	## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	##

	uses CONFIG_HAVE_MP_TABLE
	uses CONFIG_CBFS
	uses CONFIG_HAVE_PIRQ_TABLE
	uses CONFIG_USE_FALLBACK_IMAGE
	uses CONFIG_USE_FAILOVER_IMAGE
	uses CONFIG_HAVE_FALLBACK_BOOT
	uses CONFIG_HAVE_FAILOVER_BOOT
	uses CONFIG_HAVE_HARD_RESET
	uses CONFIG_IRQ_SLOT_COUNT
	uses CONFIG_HAVE_OPTION_TABLE
	uses CONFIG_MAX_CPUS
	uses CONFIG_MAX_PHYSICAL_CPUS
	uses CONFIG_LOGICAL_CPUS
	uses CONFIG_IOAPIC
	uses CONFIG_SMP
	uses CONFIG_FALLBACK_SIZE
	uses CONFIG_FAILOVER_SIZE
	uses CONFIG_ROM_SIZE
	uses CONFIG_ROM_SECTION_SIZE
	uses CONFIG_ROM_IMAGE_SIZE
	uses CONFIG_ROM_SECTION_SIZE
	uses CONFIG_ROM_SECTION_OFFSET
	uses CONFIG_ROM_PAYLOAD
	uses CONFIG_ROM_PAYLOAD_START
	uses CONFIG_COMPRESSED_PAYLOAD_LZMA
	uses CONFIG_PRECOMPRESSED_PAYLOAD
	uses CONFIG_PAYLOAD_SIZE
	uses CONFIG_ROMBASE
	uses CONFIG_XIP_ROM_SIZE
	uses CONFIG_XIP_ROM_BASE
	uses CONFIG_STACK_SIZE
	uses CONFIG_HEAP_SIZE
	uses CONFIG_USE_OPTION_TABLE
	uses CONFIG_LB_CKS_RANGE_START
	uses CONFIG_LB_CKS_RANGE_END
	uses CONFIG_LB_CKS_LOC
	uses CONFIG_MAINBOARD_PART_NUMBER
	uses CONFIG_MAINBOARD_VENDOR
	uses CONFIG_MAINBOARD
	uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
	uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
	uses COREBOOT_EXTRA_VERSION
	uses CONFIG_RAMBASE
	uses CONFIG_GDB_STUB
	uses CONFIG_CROSS_COMPILE
	uses CC
	uses HOSTCC
	uses CONFIG_OBJCOPY
	uses CONFIG_TTYS0_BAUD
	uses CONFIG_TTYS0_BASE
	uses CONFIG_TTYS0_LCS
	uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
	uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
	uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
	uses CONFIG_CONSOLE_SERIAL8250
	uses CONFIG_CONSOLE_BTEXT
	uses CONFIG_HAVE_INIT_TIMER
	uses CONFIG_GDB_STUB
	uses CONFIG_CONSOLE_VGA
	uses CONFIG_PCI_ROM_RUN
	uses CONFIG_HW_MEM_HOLE_SIZEK
	uses CONFIG_USE_DCACHE_RAM
	uses CONFIG_DCACHE_RAM_BASE
	uses CONFIG_DCACHE_RAM_SIZE
	uses CONFIG_USE_INIT
	uses CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE
	uses CONFIG_AP_CODE_IN_CAR
	uses CONFIG_MEM_TRAIN_SEQ
	uses CONFIG_WAIT_BEFORE_CPUS_INIT
	uses CONFIG_ENABLE_APIC_EXT_ID
	uses CONFIG_APIC_ID_OFFSET
	uses CONFIG_LIFT_BSP_APIC_ID
	uses CONFIG_PCI_64BIT_PREF_MEM
	uses CONFIG_HT_CHAIN_UNITID_BASE
	uses CONFIG_HT_CHAIN_END_UNITID_BASE
	uses CONFIG_SB_HT_CHAIN_ON_BUS0
	uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
	uses CONFIG_LB_MEM_TOPK
	uses CONFIG_USE_PRINTK_IN_CAR

	default CONFIG_ROM_SIZE = 512 * 1024
	default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 - CONFIG_FAILOVER_SIZE
	default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
	default CONFIG_FAILOVER_SIZE = 4 * 1024
	default CONFIG_HAVE_FALLBACK_BOOT = 1
	default CONFIG_HAVE_FAILOVER_BOOT = 1
	default CONFIG_HAVE_HARD_RESET = 1
	default CONFIG_HAVE_PIRQ_TABLE = 1
	default CONFIG_IRQ_SLOT_COUNT = 13
	default CONFIG_HAVE_MP_TABLE = 1
	default CONFIG_HAVE_OPTION_TABLE = 1
	# Move the default coreboot CMOS range off of AMD RTC registers.
	default CONFIG_LB_CKS_RANGE_START = 49
	default CONFIG_LB_CKS_RANGE_END = 122
	default CONFIG_LB_CKS_LOC = 123
	# SMP support (only worry about 2 micro processors).
	default CONFIG_SMP = 1
	default CONFIG_MAX_CPUS = 2
	default CONFIG_MAX_PHYSICAL_CPUS = 1
	default CONFIG_LOGICAL_CPUS = 1
	# 1G memory hole.
	default CONFIG_HW_MEM_HOLE_SIZEK = 0x100000
	# HT Unit ID offset, default is 1, the typical one.
	default CONFIG_HT_CHAIN_UNITID_BASE = 0
	# Real SB Unit ID, default is 0x20, mean don't touch it at last.
	# default CONFIG_HT_CHAIN_END_UNITID_BASE = 0x10
	# Make the SB HT chain on bus 0, default is not (0).
	default CONFIG_SB_HT_CHAIN_ON_BUS0 = 2
	# Only offset for SB chain?, default is yes(1).
	default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0
	# default CONFIG_CONSOLE_BTEXT = 1 # BTEXT console
	default CONFIG_CONSOLE_VGA = 1 # For VGA console
	default CONFIG_PCI_ROM_RUN = 1 # For VGA console
	default CONFIG_USE_DCACHE_RAM = 1
	default CONFIG_DCACHE_RAM_BASE = 0xc8000
	default CONFIG_DCACHE_RAM_SIZE = 32 * 1024
	default CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 4 * 1024
	default CONFIG_USE_INIT = 0
	default CONFIG_AP_CODE_IN_CAR = 0
	default CONFIG_MEM_TRAIN_SEQ = 2
	default CONFIG_WAIT_BEFORE_CPUS_INIT = 0
	# default CONFIG_ENABLE_APIC_EXT_ID = 0
	# default CONFIG_APIC_ID_OFFSET = 0x10
	# default CONFIG_LIFT_BSP_APIC_ID = 0
	# default CONFIG_PCI_64BIT_PREF_MEM = 1
	default CONFIG_IOAPIC = 1
	default CONFIG_MAINBOARD_PART_NUMBER = "A8N-E"
	default CONFIG_MAINBOARD_VENDOR = "ASUS"
	default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1043
	default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x815a
	default CONFIG_STACK_SIZE = 8 * 1024
	default CONFIG_HEAP_SIZE = 16 * 1024
	# Only use the option table in a normal image.
	default CONFIG_USE_OPTION_TABLE = (!CONFIG_USE_FALLBACK_IMAGE) && (!CONFIG_USE_FAILOVER_IMAGE)
	default CONFIG_RAMBASE = 0x00004000
	default CONFIG_ROM_PAYLOAD = 1
	default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32"
	default HOSTCC = "gcc"
	default CONFIG_GDB_STUB = 0
	default CONFIG_USE_PRINTK_IN_CAR=1
	default CONFIG_CONSOLE_SERIAL8250 = 1
	default CONFIG_TTYS0_BAUD = 115200
	default CONFIG_TTYS0_BASE = 0x3f8
	default CONFIG_TTYS0_LCS = 0x3
	default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8
	default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8
	default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"

	#
	# CBFS
	#
	#
	default CONFIG_CBFS=1
	end