Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
b3267e002e798e90ca09b11e42ea8949dccde2e7
/
.
/
src
/
include
/
cpu
/
intel
/
romstage.h
blob: 47cd169e6a40e313deeb46280c23f214fd96b623 [
file
] [
log
] [
blame
]
#ifndef
_CPU_INTEL_ROMSTAGE_H
#define
_CPU_INTEL_ROMSTAGE_H
#include
<arch/cpu.h>
void
mainboard_romstage_entry
(
unsigned
long
bist
);
void
platform_enter_postcar
(
void
);
#endif
/* _CPU_INTEL_ROMSTAGE_H */