Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
ad6157ebdfddc39b95e388487e00cadd2bbf368b
/
.
/
src
/
soc
/
intel
/
common
/
block
/
dsp
/
Makefile.inc
blob: 6c2cb79d4ee283acc18ba00b78fcf1b2654ae3aa [
file
] [
log
] [
blame
]
ramstage
-
$
(
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP
)
+=
dsp
.
c