Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
a9a92ac961f8f46b7cdca2176428d5e363f44912
/
.
/
src
/
soc
/
ucb
/
riscv
/
chip.c
blob: 187e96d274451f5a0b448c4b4a8cedea1c7127d7 [
file
] [
log
] [
blame
]
/* SPDX-License-Identifier: GPL-2.0-only */
#include
<device/device.h>
struct
chip_operations soc_ucb_riscv_ops
=
{
CHIP_NAME
(
"UCB RISC-V"
)
};