| # |
| # This file is part of the coreboot project. |
| # |
| # Copyright (C) 2014 Imagination Technologies |
| # |
| # This program is free software; you can redistribute it and/or |
| # modify it under the terms of the GNU General Public License as |
| # published by the Free Software Foundation; version 2 of |
| # the License. |
| # |
| # This program is distributed in the hope that it will be useful, |
| # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| # GNU General Public License for more details. |
| # |
| |
| if BOARD_GOOGLE_URARA |
| |
| config BOARD_SPECIFIC_OPTIONS |
| def_bool y |
| select BOARD_ROMSIZE_KB_512 |
| select BOOTBLOCK_CONSOLE |
| select MAINBOARD_HAS_CHROMEOS |
| select SPI_FLASH_WINBOND |
| select CPU_IMGTEC_PISTACHIO |
| select COMMON_CBFS_SPI_WRAPPER |
| select SPI_FLASH |
| select BOARD_ID_MANUAL |
| |
| config MAINBOARD_DIR |
| string |
| default "google/urara" |
| |
| config MAINBOARD_PART_NUMBER |
| string |
| default "ImgTec Pistachio Virtual Platform" |
| |
| config BOOTBLOCK_MAINBOARD_INIT |
| string |
| default "mainboard/google/urara/bootblock.c" |
| |
| config DRAM_SIZE_MB |
| int |
| default 256 |
| |
| config TTYS0_LCS |
| int |
| default 3 |
| |
| config CONSOLE_SERIAL_UART_ADDRESS |
| hex |
| depends on DRIVERS_UART |
| default 0xB8101500 |
| |
| config BOOT_DEVICE_SPI_FLASH_BUS |
| int |
| default 1 |
| |
| config GBB_HWID |
| string |
| depends on CHROMEOS |
| default "Urara TEST 1" |
| endif |