soc/intel/braswell: Hide some Kconfig options in menuconfig
Don't allow the user to set PCIe configspace base address.
Don't allow the user to set the DCACHE size and base.
Change-Id: I7a42cc5f6098214364624bcfa3cbd93b4903ee84
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20181
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 520253a..36af3fe 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -55,7 +55,7 @@
default "soc/intel/braswell/bootblock/bootblock.c"
config MMCONF_BASE_ADDRESS
- hex "PCIe CFG Base Address"
+ hex
default 0xe0000000
config MAX_CPUS
@@ -88,11 +88,11 @@
#
config DCACHE_RAM_BASE
- hex "Temporary RAM Base Address"
+ hex
default 0xfef00000
config DCACHE_RAM_SIZE
- hex "Temporary RAM Size"
+ hex
default 0x4000
help
The size of the cache-as-ram region required during bootblock