diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 520253a..36af3fe 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -55,7 +55,7 @@
 	default "soc/intel/braswell/bootblock/bootblock.c"
 
 config MMCONF_BASE_ADDRESS
-	hex "PCIe CFG Base Address"
+	hex
 	default 0xe0000000
 
 config MAX_CPUS
@@ -88,11 +88,11 @@
 #
 
 config DCACHE_RAM_BASE
-	hex "Temporary RAM Base Address"
+	hex
 	default 0xfef00000
 
 config DCACHE_RAM_SIZE
-	hex "Temporary RAM Size"
+	hex
 	default 0x4000
 	help
 	  The size of the cache-as-ram region required during bootblock