device/pci_ops: Define pci_find_capability() just once
Wrap the simple romstage implementation to be called
from ramstage.
Change-Id: Iadadf3d550416850d6c37233bd4eda025f4d3960
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31755
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/cavium/common/ecam.c b/src/soc/cavium/common/ecam.c
index ae2a91f..89c69db 100644
--- a/src/soc/cavium/common/ecam.c
+++ b/src/soc/cavium/common/ecam.c
@@ -17,6 +17,8 @@
* Derived from Cavium's BSD-3 Clause OCTEONTX-SDK-6.2.0.
*/
+#define __SIMPLE_DEVICE__
+
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <device/pci.h>
@@ -27,15 +29,11 @@
* Get PCI BAR address from cavium specific extended capability.
* Use regular BAR if not found in extended capability space.
*
- * @return The pyhsical address of the BAR, zero on error
+ * @return The physical address of the BAR, zero on error
*/
-#ifdef __SIMPLE_DEVICE__
uint64_t ecam0_get_bar_val(pci_devfn_t dev, u8 bar)
-#else
-uint64_t ecam0_get_bar_val(struct device *dev, u8 bar)
-#endif
{
- size_t cap_offset = pci_find_capability(dev, 0x14);
+ size_t cap_offset = pci_s_find_capability(dev, 0x14);
uint64_t h, l, ret = 0;
if (cap_offset) {
/* Found EA */