intel/baytrail: Spelling fixes
Change-Id: Ideb58634a029d55746421ad1ea4b80811bca403c
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7705
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 500a13d..5274b03 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -158,7 +158,7 @@
{
const uint16_t port = 0x3f8;
- /* Is the UART I/O port eanbled? */
+ /* Is the UART I/O port enabled? */
if (!(pci_read_config32(dev, UART_CONT) & 1))
return;
@@ -223,7 +223,7 @@
* Common code for the south cluster devices.
*/
-/* Set bit in function disble register to hide this device. */
+/* Set bit in function disable register to hide this device. */
static void sc_disable_devfn(device_t dev)
{
const unsigned long func_dis = PMC_BASE_ADDRESS + FUNC_DIS;