commit | 97c5464443306f26b61cec3a0f50108a5c06b7ef | [log] [tgz] |
---|---|---|
author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | Sun May 10 01:24:11 2020 +0530 |
committer | Patrick Georgi <pgeorgi@google.com> | Mon May 18 07:13:23 2020 +0000 |
tree | f085457907ad200a0d9d9be8a07c937e755fae91 | |
parent | 19c2ce7639d55908d210782ae5a0315396cc7eaf [diff] [blame] |
skylake: update processor power limits configuration Update processor power limit configuration parameters based on common code base support for Intel Skylake SoC based platforms. BRANCH=None BUG=None TEST=Built and tested on nami system Change-Id: Idc82f3d2f805b92fb3005d2f49098e55cb142e45 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41238 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index 436a4ed..fa50283 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
@@ -111,7 +111,9 @@ }" # PL2 override 60W - register "tdp_pl2_override" = "60" + register "power_limits_config" = "{ + .tdp_pl2_override = 60, + }" # Power Limit Related register "PowerLimit4" = "0"