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9631016660423d0585a1
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src
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soc
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intel
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baytrail
/
romstage
/
Makefile.inc
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cpu_incs
-
y
+=
$
(
src
)/
soc
/
intel
/
baytrail
/
romstage
/
cache_as_ram
.
inc
romstage
-
y
+=
romstage
.
c
romstage
-
y
+=
raminit
.
c
romstage
-
$
(
CONFIG_ENABLE_BUILTIN_COM1
)
+=
uart
.
c
romstage
-
y
+=
gfx
.
c
romstage
-
y
+=
pmc
.
c
romstage
-
y
+=
early_spi
.
c