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coreboot
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9631016660423d0585a1
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.
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src
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mainboard
/
bifferos
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bifferboard
/
devicetree.cb
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chip northbridge
/
rdc
/
r8610
device domain
0
on
device pci
0.0
on
end
chip southbridge
/
rdc
/
r8610
# Southbridge
device pci
7.0
on
end
# SB
end
end
end