| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright (C) 2011 Alexandru Gagniuc <mr.nuke.me@gmail.com> |
| ## |
| ## This program is free software: you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation, either version 2 of the License, or |
| ## (at your option) any later version. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| |
| config CPU_VIA_NANO |
| bool |
| |
| if CPU_VIA_NANO |
| |
| config CPU_SPECIFIC_OPTIONS |
| def_bool y |
| select ARCH_BOOTBLOCK_X86_32 |
| select ARCH_VERSTAGE_X86_32 |
| select ARCH_ROMSTAGE_X86_32 |
| select ARCH_RAMSTAGE_X86_32 |
| select UDELAY_TSC |
| select MMX |
| select SSE2 |
| select SUPPORT_CPU_UCODE_IN_CBFS |
| |
| config DCACHE_RAM_BASE |
| hex |
| default 0xffe00000 |
| |
| config DCACHE_RAM_SIZE |
| hex |
| default 0x8000 |
| |
| endif # CPU_VIA_NANO |