| config CPU_AMD_MODEL_10XXX |
| bool |
| select ARCH_BOOTBLOCK_X86_32 |
| select ARCH_VERSTAGE_X86_32 |
| select ARCH_ROMSTAGE_X86_32 |
| select ARCH_RAMSTAGE_X86_32 |
| select SSE |
| select SSE2 |
| select MMCONF_SUPPORT_DEFAULT |
| select TSC_SYNC_LFENCE |
| select UDELAY_LAPIC |
| select HAVE_MONOTONIC_TIMER |
| select SUPPORT_CPU_UCODE_IN_CBFS |
| select CPU_MICROCODE_MULTIPLE_FILES |
| |
| if CPU_AMD_MODEL_10XXX |
| |
| config USE_LARGE_DCACHE |
| bool |
| default y if CPU_AMD_SOCKET_G34_NON_AGESA |
| default y if CPU_AMD_SOCKET_C32_NON_AGESA |
| default n |
| |
| config NUM_IPI_STARTS |
| int |
| default 1 |
| |
| config CPU_ADDR_BITS |
| int |
| default 48 |
| |
| config DCACHE_RAM_BASE |
| hex |
| default 0xc4000 |
| |
| config DCACHE_RAM_SIZE |
| hex |
| default 0x0c000 |
| |
| config DCACHE_BSP_STACK_SIZE |
| hex |
| default 0x4000 |
| |
| config DCACHE_BSP_STACK_SLUSH |
| hex |
| default 0x4000 if USE_LARGE_DCACHE |
| default 0x1000 |
| |
| config DCACHE_AP_STACK_SIZE |
| hex |
| default 0x400 |
| |
| config UDELAY_IO |
| bool |
| default n |
| |
| config SET_FIDVID |
| bool |
| default y |
| |
| config MAX_PHYSICAL_CPUS |
| int |
| default 1 |
| |
| config LIFT_BSP_APIC_ID |
| bool |
| default n |
| |
| if SET_FIDVID |
| config SET_FIDVID_DEBUG |
| bool |
| default y |
| |
| config SET_FIDVID_STORE_AP_APICID_AT_FIRST |
| bool |
| default y |
| |
| config SET_FIDVID_CORE0_ONLY |
| bool |
| default n |
| |
| # 0: all cores |
| # 1: core 0 only |
| # 2: all but core 0 |
| config SET_FIDVID_CORE_RANGE |
| int |
| default 0 |
| |
| endif # SET_FIDVID |
| |
| config UDELAY_LAPIC_FIXED_FSB |
| int |
| default 200 |
| |
| endif # CPU_AMD_MODEL_10XXX |