mb/intel/adlrvp{p,m}: Enable dynamic GPIO PM
GPIO PM was disabled for adlrvp to evaluate if longer interrupt pulses
are required for ADL. Since ADL requires 4us long pulses (EDS:626817),
GPIO PM can be enabled. This change drops the GPIO PM override and
re-enables dynamic GPIO PM.
TEST=Boot adlrvp to OS, ensure no TPM timeout errors.
Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I0b7b66b5525d8b80775ab7578ce6b12181af7882
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index cd198d5..a00ad35 100644
--- a/src/mainboard/intel/adlrvp/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
@@ -41,16 +41,6 @@
# EC memory map range is 0x900-0x9ff
register "gen3_dec" = "0x00fc0901"
- # This disabled autonomous GPIO power management, otherwise
- # old cr50 FW only supports short pulses; need to clarify
- # the minimum PCH IRQ pulse width with Intel, b/180111628
- register "gpio_override_pm" = "1"
- register "gpio_pm[COMM_0]" = "0"
- register "gpio_pm[COMM_1]" = "0"
- register "gpio_pm[COMM_2]" = "0"
- register "gpio_pm[COMM_4]" = "0"
- register "gpio_pm[COMM_5]" = "0"
-
# Enable PCH PCIE RP 5 using CLK 2
register "pch_pcie_rp[PCH_RP(5)]" = "{
.clk_src = 2,
diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb
index 5d24a42..1a8c641 100644
--- a/src/mainboard/intel/adlrvp/devicetree_m.cb
+++ b/src/mainboard/intel/adlrvp/devicetree_m.cb
@@ -10,15 +10,6 @@
device lapic 0 on end
end
- # This disables autonomous GPIO power management, otherwise
- # old cr50 FW only supports short pulses.
- register "gpio_override_pm" = "1"
- register "gpio_pm[COMM_0]" = "0"
- register "gpio_pm[COMM_1]" = "0"
- register "gpio_pm[COMM_2]" = "0"
- register "gpio_pm[COMM_4]" = "0"
- register "gpio_pm[COMM_5]" = "0"
-
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE