| if BOARD_TYAN_S2912_FAM10 |
| |
| config BOARD_SPECIFIC_OPTIONS # dummy |
| def_bool y |
| select ARCH_X86 |
| select CPU_AMD_SOCKET_F_1207 |
| select DIMM_DDR2 |
| select DIMM_REGISTERED |
| select NORTHBRIDGE_AMD_AMDFAM10 |
| select SOUTHBRIDGE_NVIDIA_MCP55 |
| select MCP55_USE_NIC |
| select SUPERIO_WINBOND_W83627HF |
| select HAVE_BUS_CONFIG |
| select HAVE_OPTION_TABLE |
| select HAVE_PIRQ_TABLE |
| select HAVE_MP_TABLE |
| select HAVE_HARD_RESET |
| select LIFT_BSP_APIC_ID |
| select BOARD_ROMSIZE_KB_1024 |
| select RAMINIT_SYSINFO |
| select ENABLE_APIC_EXT_ID |
| select AMDMCT |
| select TINY_BOOTBLOCK |
| select MMCONF_SUPPORT_DEFAULT |
| select QRANK_DIMM_SUPPORT |
| |
| config MAINBOARD_DIR |
| string |
| default tyan/s2912_fam10 |
| |
| config DCACHE_RAM_BASE |
| hex |
| default 0xc4000 |
| |
| config DCACHE_RAM_SIZE |
| hex |
| default 0x0c000 |
| |
| config DCACHE_RAM_GLOBAL_VAR_SIZE |
| hex |
| default 0x04000 |
| |
| config APIC_ID_OFFSET |
| hex |
| default 0 |
| |
| config MEM_TRAIN_SEQ |
| int |
| default 2 |
| |
| config SB_HT_CHAIN_ON_BUS0 |
| int |
| default 2 |
| |
| config MAINBOARD_PART_NUMBER |
| string |
| default "S2912 (Fam10)" |
| |
| config PCI_64BIT_PREF_MEM |
| bool |
| default n |
| |
| config MAX_CPUS |
| int |
| default 12 |
| |
| config MAX_PHYSICAL_CPUS |
| int |
| default 2 |
| |
| config HT_CHAIN_UNITID_BASE |
| hex |
| default 0x1 |
| |
| config HT_CHAIN_END_UNITID_BASE |
| hex |
| default 0x20 |
| |
| config SERIAL_CPU_INIT |
| bool |
| default n |
| |
| config IRQ_SLOT_COUNT |
| int |
| default 11 |
| |
| config AMD_UCODE_PATCH_FILE |
| string |
| default "mc_patch_01000095.h" |
| |
| config RAMBASE |
| hex |
| default 0x200000 |
| |
| config RAMTOP |
| hex |
| default 0x1000000 |
| |
| config HEAP_SIZE |
| hex |
| default 0xc0000 |
| |
| config MCP55_PCI_E_X_0 |
| int |
| default 1 |
| |
| endif # BOARD_TYAN_S2912_FAM10 |